From patchwork Tue May 31 18:34:06 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Petr_=C5=A0tetiar?= X-Patchwork-Id: 98100 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 66E6AB6F80 for ; Wed, 1 Jun 2011 10:50:31 +1000 (EST) Received: from canuck.infradead.org ([134.117.69.58]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QRZdg-0007uV-C3; Wed, 01 Jun 2011 00:50:24 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QRU6K-0001CL-52; Tue, 31 May 2011 18:55:36 +0000 Received: from casper.infradead.org ([2001:770:15f::2]) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QRTmR-0000bV-Vm for linux-arm-kernel@canuck.infradead.org; Tue, 31 May 2011 18:35:04 +0000 Received: from ibawizard.net ([82.208.49.253] helo=mengele.ibawizard.net) by casper.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QRTmL-0007Th-DK for linux-arm-kernel@lists.infradead.org; Tue, 31 May 2011 18:34:59 +0000 Received: from ntbk.lan (localhost [127.0.0.1]) by mengele.ibawizard.net (Postfix) with ESMTP id 8C4A91D3612F; Tue, 31 May 2011 20:34:03 +0200 (CEST) From: =?UTF-8?q?Petr=20=C5=A0tetiar?= To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2] ARM: ep93xx: use more reliable CPLD watchdog for reset on ts72xx Date: Tue, 31 May 2011 20:34:06 +0200 Message-Id: <1306866846-3167-1-git-send-email-ynezz@true.cz> X-Mailer: git-send-email 1.7.1 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110531_193457_632885_D25518BE X-CRM114-Status: GOOD ( 14.81 ) X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.3.2-r929478 on casper.infradead.org summary: Content analysis details: (-1.9 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Hartley Sweeten , =?UTF-8?q?Petr=20=C5=A0tetiar?= , Ryan Mallon X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org On all ep93xx based boards from Technologic Systems, there's CPLD watchdog available, so use this one to reset the board instead of the soft reset in CPU. I've seen some weird lockups with the soft reset on ep93xx in the past, while the reset via CPLD watchdog seems to be rock solid (tm) and works fine so far. Cc: Hartley Sweeten Cc: Ryan Mallon Signed-off-by: Petr Štetiar --- arch/arm/mach-ep93xx/include/mach/system.h | 12 ++++++++++++ 1 files changed, 12 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-ep93xx/include/mach/system.h b/arch/arm/mach-ep93xx/include/mach/system.h index 6d661fe..8d31c4d 100644 --- a/arch/arm/mach-ep93xx/include/mach/system.h +++ b/arch/arm/mach-ep93xx/include/mach/system.h @@ -2,7 +2,10 @@ * arch/arm/mach-ep93xx/include/mach/system.h */ +#include + #include +#include static inline void arch_idle(void) { @@ -14,6 +17,15 @@ static inline void arch_reset(char mode, const char *cmd) local_irq_disable(); /* + * It's more reliable to use CPLD watchdog to perform the reset + */ + if (board_is_ts7200() || board_is_ts7250() || board_is_ts7260() || + board_is_ts7300() || board_is_ts7400()) { + __raw_writeb(0x5, TS72XX_WDT_FEED_PHYS_BASE); + __raw_writeb(0x1, TS72XX_WDT_CONTROL_PHYS_BASE); + } + + /* * Set then clear the SWRST bit to initiate a software reset */ ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_SWRST);