diff mbox

pata_atiixp: fix slave device support

Message ID 200908061747.05944.bzolnier@gmail.com
State Not Applicable
Delegated to: David Miller
Headers show

Commit Message

Bartlomiej Zolnierkiewicz Aug. 6, 2009, 3:47 p.m. UTC 
On Thursday 06 August 2009 17:40:15 Bartlomiej Zolnierkiewicz wrote:
> From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
> Subject: [PATCH] pata_atiixp: fix slave device support

Argh, I pushed the "Send" button too quick..

Below version with the correct patch description
(I doubt that this fix will help with bug #13921)..

From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH v2] pata_atiixp: fix second channel support

PIO and MWDMA timings are never programmed for the second channel
because timing registers are treated as 16-bit long ones.

The bug is an attixp -> pata_atiixp regression and goes back to:

	commit 669a5db411d85a14f86cd92bc16bf7ab5b8aa235
	Author: Jeff Garzik <jeff@garzik.org>
	Date:   Tue Aug 29 18:12:40 2006 -0400

	    [libata] Add a bunch of PATA drivers.

Cc: Krystian Juskowiak <jusko@tlen.pl>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Borislav Petkov <bbpetkov@yahoo.de>
Cc: Robert Hancock <hancockrwd@gmail.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
After this patch pata_atiixp still have two bugs (+ few superfluous oddities)
not present in atiixp (although not as severe as this one)..

 drivers/ata/pata_atiixp.c |   19 ++++++++++---------
 1 file changed, 10 insertions(+), 9 deletions(-)

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Comments

Jeff Garzik Aug. 12, 2009, 10:25 a.m. UTC | #1 
Bartlomiej Zolnierkiewicz wrote:
> On Thursday 06 August 2009 17:40:15 Bartlomiej Zolnierkiewicz wrote:
>> From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
>> Subject: [PATCH] pata_atiixp: fix slave device support
> 
> Argh, I pushed the "Send" button too quick..
> 
> Below version with the correct patch description
> (I doubt that this fix will help with bug #13921)..
> 
> From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
> Subject: [PATCH v2] pata_atiixp: fix second channel support
> 
> PIO and MWDMA timings are never programmed for the second channel
> because timing registers are treated as 16-bit long ones.
> 
> The bug is an attixp -> pata_atiixp regression and goes back to:
> 
> 	commit 669a5db411d85a14f86cd92bc16bf7ab5b8aa235
> 	Author: Jeff Garzik <jeff@garzik.org>
> 	Date:   Tue Aug 29 18:12:40 2006 -0400
> 
> 	    [libata] Add a bunch of PATA drivers.
> 
> Cc: Krystian Juskowiak <jusko@tlen.pl>
> Cc: Andrew Morton <akpm@linux-foundation.org>
> Cc: Borislav Petkov <bbpetkov@yahoo.de>
> Cc: Robert Hancock <hancockrwd@gmail.com>
> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
> ---
> After this patch pata_atiixp still have two bugs (+ few superfluous oddities)
> not present in atiixp (although not as severe as this one)..
> 
>  drivers/ata/pata_atiixp.c |   19 ++++++++++---------
>  1 file changed, 10 insertions(+), 9 deletions(-)

applied


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diff mbox

Patch

Index: b/drivers/ata/pata_atiixp.c
===================================================================
--- a/drivers/ata/pata_atiixp.c
+++ b/drivers/ata/pata_atiixp.c
@@ -1,6 +1,7 @@ 
 /*
  * pata_atiixp.c 	- ATI PATA for new ATA layer
  *			  (C) 2005 Red Hat Inc
+ *			  (C) 2009 Bartlomiej Zolnierkiewicz
  *
  * Based on
  *
@@ -61,20 +62,19 @@  static void atiixp_set_pio_timing(struct
 
 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 	int dn = 2 * ap->port_no + adev->devno;
-
-	/* Check this is correct - the order is odd in both drivers */
 	int timing_shift = (16 * ap->port_no) + 8 * (adev->devno ^ 1);
-	u16 pio_mode_data, pio_timing_data;
+	u32 pio_timing_data;
+	u16 pio_mode_data;
 
 	pci_read_config_word(pdev, ATIIXP_IDE_PIO_MODE, &pio_mode_data);
 	pio_mode_data &= ~(0x7 << (4 * dn));
 	pio_mode_data |= pio << (4 * dn);
 	pci_write_config_word(pdev, ATIIXP_IDE_PIO_MODE, pio_mode_data);
 
-	pci_read_config_word(pdev, ATIIXP_IDE_PIO_TIMING, &pio_timing_data);
+	pci_read_config_dword(pdev, ATIIXP_IDE_PIO_TIMING, &pio_timing_data);
 	pio_timing_data &= ~(0xFF << timing_shift);
 	pio_timing_data |= (pio_timings[pio] << timing_shift);
-	pci_write_config_word(pdev, ATIIXP_IDE_PIO_TIMING, pio_timing_data);
+	pci_write_config_dword(pdev, ATIIXP_IDE_PIO_TIMING, pio_timing_data);
 }
 
 /**
@@ -119,16 +119,17 @@  static void atiixp_set_dmamode(struct at
 		udma_mode_data |= dma << (4 * dn);
 		pci_write_config_word(pdev, ATIIXP_IDE_UDMA_MODE, udma_mode_data);
 	} else {
-		u16 mwdma_timing_data;
-		/* Check this is correct - the order is odd in both drivers */
 		int timing_shift = (16 * ap->port_no) + 8 * (adev->devno ^ 1);
+		u32 mwdma_timing_data;
 
 		dma -= XFER_MW_DMA_0;
 
-		pci_read_config_word(pdev, ATIIXP_IDE_MWDMA_TIMING, &mwdma_timing_data);
+		pci_read_config_dword(pdev, ATIIXP_IDE_MWDMA_TIMING,
+				      &mwdma_timing_data);
 		mwdma_timing_data &= ~(0xFF << timing_shift);
 		mwdma_timing_data |= (mwdma_timings[dma] << timing_shift);
-		pci_write_config_word(pdev, ATIIXP_IDE_MWDMA_TIMING, mwdma_timing_data);
+		pci_write_config_dword(pdev, ATIIXP_IDE_MWDMA_TIMING,
+				       mwdma_timing_data);
 	}
 	/*
 	 *	We must now look at the PIO mode situation. We may need to