From patchwork Tue Apr 26 09:03:06 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 614870 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3qvHZv4ghDz9snm for ; Tue, 26 Apr 2016 19:18:47 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752074AbcDZJSA (ORCPT ); Tue, 26 Apr 2016 05:18:00 -0400 Received: from mga02.intel.com ([134.134.136.20]:32579 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752368AbcDZJDe (ORCPT ); Tue, 26 Apr 2016 05:03:34 -0400 Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga101.jf.intel.com with ESMTP; 26 Apr 2016 02:03:32 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,536,1455004800"; d="scan'208";a="692375881" Received: from black.fi.intel.com ([10.237.72.93]) by FMSMGA003.fm.intel.com with ESMTP; 26 Apr 2016 02:03:29 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id DC2AF373; Tue, 26 Apr 2016 12:03:25 +0300 (EEST) From: Andy Shevchenko To: Tejun Heo , linux-ide@vger.kernel.org, Rob Herring , linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, Christian Lamparter , =?UTF-8?q?M=C3=A5ns=20Rullg=C3=A5rd?= , Julian Margetson Cc: Andy Shevchenko Subject: [PATCH v2 05/23] ata: sata_dwc_460ex: DMA is always a flow controller Date: Tue, 26 Apr 2016 12:03:06 +0300 Message-Id: <1461661404-1952-6-git-send-email-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.8.0.rc3 In-Reply-To: <1461661404-1952-1-git-send-email-andriy.shevchenko@linux.intel.com> References: <1461661404-1952-1-git-send-email-andriy.shevchenko@linux.intel.com> Sender: linux-ide-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-ide@vger.kernel.org In the original code the DMA is always a flow controller. Set this accordingly in updated code. Tested-by: Christian Lamparter Signed-off-by: Andy Shevchenko --- drivers/ata/sata_dwc_460ex.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/ata/sata_dwc_460ex.c b/drivers/ata/sata_dwc_460ex.c index 4cac27d..1250e18 100644 --- a/drivers/ata/sata_dwc_460ex.c +++ b/drivers/ata/sata_dwc_460ex.c @@ -311,7 +311,7 @@ static struct dma_async_tx_descriptor *dma_dwc_xfer_setup(struct ata_queued_cmd if (qc->dma_dir == DMA_DEV_TO_MEM) { sconf.src_addr = addr; - sconf.device_fc = true; + sconf.device_fc = false; } else { /* DMA_MEM_TO_DEV */ sconf.dst_addr = addr; sconf.device_fc = false;