From patchwork Tue Apr 26 09:03:18 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 614863 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3qvHWt0HRyz9snm for ; Tue, 26 Apr 2016 19:16:10 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752465AbcDZJDi (ORCPT ); Tue, 26 Apr 2016 05:03:38 -0400 Received: from mga04.intel.com ([192.55.52.120]:61179 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752392AbcDZJDg (ORCPT ); Tue, 26 Apr 2016 05:03:36 -0400 Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga104.fm.intel.com with ESMTP; 26 Apr 2016 02:03:35 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,536,1455004800"; d="scan'208";a="962851970" Received: from black.fi.intel.com ([10.237.72.93]) by orsmga002.jf.intel.com with ESMTP; 26 Apr 2016 02:03:33 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 6378F7D0; Tue, 26 Apr 2016 12:03:26 +0300 (EEST) From: Andy Shevchenko To: Tejun Heo , linux-ide@vger.kernel.org, Rob Herring , linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, Christian Lamparter , =?UTF-8?q?M=C3=A5ns=20Rullg=C3=A5rd?= , Julian Margetson Cc: Andy Shevchenko Subject: [PATCH v2 17/23] ata: sata_dwc_460ex: supply physical address of FIFO to DMA Date: Tue, 26 Apr 2016 12:03:18 +0300 Message-Id: <1461661404-1952-18-git-send-email-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.8.0.rc3 In-Reply-To: <1461661404-1952-1-git-send-email-andriy.shevchenko@linux.intel.com> References: <1461661404-1952-1-git-send-email-andriy.shevchenko@linux.intel.com> Sender: linux-ide-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-ide@vger.kernel.org DMA operates with physical addresses which is not exactly the same as ioremap() returns. Introduce variable to keep physical address of the SATA FIFO register and supply it when prepare DMA channel. Tested-by: Christian Lamparter Signed-off-by: Andy Shevchenko --- drivers/ata/sata_dwc_460ex.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/ata/sata_dwc_460ex.c b/drivers/ata/sata_dwc_460ex.c index 25e00f2..7b73728 100644 --- a/drivers/ata/sata_dwc_460ex.c +++ b/drivers/ata/sata_dwc_460ex.c @@ -100,7 +100,7 @@ struct sata_dwc_regs { u32 versionr; /* Version Register */ u32 idr; /* ID Register */ u32 unimpl[192]; /* Unimplemented */ - u32 dmadr[256]; /* FIFO Locations in DMA Mode */ + u32 dmadr[256]; /* FIFO Locations in DMA Mode */ }; enum { @@ -149,6 +149,7 @@ struct sata_dwc_device { u32 sactive_issued; u32 sactive_queued; struct phy *phy; + phys_addr_t dmadr; #ifdef CONFIG_SATA_DWC_OLD_DMA struct dw_dma_chip *dma; #endif @@ -380,15 +381,14 @@ static struct dma_async_tx_descriptor *dma_dwc_xfer_setup(struct ata_queued_cmd struct ata_port *ap = qc->ap; struct sata_dwc_device_port *hsdevp = HSDEVP_FROM_AP(ap); struct sata_dwc_device *hsdev = HSDEV_FROM_AP(ap); - dma_addr_t addr = (dma_addr_t)&hsdev->sata_dwc_regs->dmadr; struct dma_slave_config sconf; struct dma_async_tx_descriptor *desc; if (qc->dma_dir == DMA_DEV_TO_MEM) { - sconf.src_addr = addr; + sconf.src_addr = hsdev->dmadr; sconf.device_fc = false; } else { /* DMA_MEM_TO_DEV */ - sconf.dst_addr = addr; + sconf.dst_addr = hsdev->dmadr; sconf.device_fc = false; } @@ -411,8 +411,8 @@ static struct dma_async_tx_descriptor *dma_dwc_xfer_setup(struct ata_queued_cmd desc->callback = dma_dwc_xfer_done; desc->callback_param = hsdev; - dev_dbg(hsdev->dev, "%s sg: 0x%p, count: %d addr: %pad\n", - __func__, qc->sg, qc->n_elem, &addr); + dev_dbg(hsdev->dev, "%s sg: 0x%p, count: %d addr: %pa\n", __func__, + qc->sg, qc->n_elem, &hsdev->dmadr); return desc; } @@ -1247,6 +1247,7 @@ static int sata_dwc_probe(struct platform_device *ofdev) /* Synopsys DWC SATA specific Registers */ hsdev->sata_dwc_regs = base + SATA_DWC_REG_OFFSET; + hsdev->dmadr = res->start + SATA_DWC_REG_OFFSET + offsetof(struct sata_dwc_regs, dmadr); /* Setup port */ host->ports[0]->ioaddr.cmd_addr = base;