From patchwork Thu Apr 21 18:15:24 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 613243 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3qrRt544rCz9t3c for ; Fri, 22 Apr 2016 04:22:05 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754037AbcDUSPy (ORCPT ); Thu, 21 Apr 2016 14:15:54 -0400 Received: from mga14.intel.com ([192.55.52.115]:21993 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752149AbcDUSPw (ORCPT ); Thu, 21 Apr 2016 14:15:52 -0400 Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga103.fm.intel.com with ESMTP; 21 Apr 2016 11:15:50 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,513,1455004800"; d="scan'208";a="937434989" Received: from black.fi.intel.com ([10.237.72.93]) by orsmga001.jf.intel.com with ESMTP; 21 Apr 2016 11:15:48 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id BD8D634C; Thu, 21 Apr 2016 21:15:45 +0300 (EEST) From: Andy Shevchenko To: Tejun Heo , linux-ide@vger.kernel.org, Rob Herring , linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, Christian Lamparter , =?UTF-8?q?M=C3=A5ns=20Rullg=C3=A5rd?= , Julian Margetson Cc: Andy Shevchenko Subject: [PATCH v1 03/23] ata: sata_dwc_460ex: set dma_boundary to 0x1fff Date: Thu, 21 Apr 2016 21:15:24 +0300 Message-Id: <1461262544-115408-4-git-send-email-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.8.0.rc3 In-Reply-To: <1461262544-115408-1-git-send-email-andriy.shevchenko@linux.intel.com> References: <1461262544-115408-1-git-send-email-andriy.shevchenko@linux.intel.com> Sender: linux-ide-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-ide@vger.kernel.org The original code states: Make sure a LLI block is not created that will span 8K max FIS boundary. If the block spans such a FIS boundary, there is a chance that a DMA burst will cross that boundary -- this results in an error in the host controller. Since we have switched to generic DMAengine API we satisfy above by setting dma_boundary value to 0x1fff. Suggested-by: Mans Rullgard Signed-off-by: Andy Shevchenko --- drivers/ata/sata_dwc_460ex.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/ata/sata_dwc_460ex.c b/drivers/ata/sata_dwc_460ex.c index 7f95389..aee8873 100644 --- a/drivers/ata/sata_dwc_460ex.c +++ b/drivers/ata/sata_dwc_460ex.c @@ -1151,7 +1151,13 @@ static struct scsi_host_template sata_dwc_sht = { */ .sg_tablesize = LIBATA_MAX_PRD, /* .can_queue = ATA_MAX_QUEUE, */ - .dma_boundary = ATA_DMA_BOUNDARY, + /* + * Make sure a LLI block is not created that will span 8K max FIS + * boundary. If the block spans such a FIS boundary, there is a chance + * that a DMA burst will cross that boundary -- this results in an + * error in the host controller. + */ + .dma_boundary = 0x1fff /* ATA_DMA_BOUNDARY */, }; static struct ata_port_operations sata_dwc_ops = {