From patchwork Fri May 17 22:46:05 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rudolf Marek X-Patchwork-Id: 244713 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 4F9D52C0040 for ; Sat, 18 May 2013 08:55:33 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751369Ab3EQWzc (ORCPT ); Fri, 17 May 2013 18:55:32 -0400 Received: from ms.trustica.cz ([82.208.32.68]:56228 "EHLO ms.trustica.cz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751343Ab3EQWzb (ORCPT ); Fri, 17 May 2013 18:55:31 -0400 X-Greylist: delayed 563 seconds by postgrey-1.27 at vger.kernel.org; Fri, 17 May 2013 18:55:31 EDT Received: from localhost (localhost [127.0.0.1]) by ms.trustica.cz (Postfix) with ESMTP id 700DB47201E; Sat, 18 May 2013 00:46:08 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at ms.trustica.cz X-Spam-Flag: NO X-Spam-Score: -2.9 X-Spam-Level: X-Spam-Status: No, score=-2.9 tagged_above=-500 required=3.8 tests=[ALL_TRUSTED=-1, BAYES_00=-1.9] autolearn=ham Received: from ms.trustica.cz ([127.0.0.1]) by localhost (ms.trustica.cz [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id fW+m8yxVBJhB; Sat, 18 May 2013 00:46:07 +0200 (CEST) Received: from [192.168.88.251] (56.32.broadband3.iol.cz [85.70.32.56]) (Authenticated sender: r.marek@assembler.cz) by ms.trustica.cz (Postfix) with ESMTPSA id 3E04347201C; Sat, 18 May 2013 00:46:07 +0200 (CEST) Message-ID: <5196B32D.7060501@assembler.cz> Date: Sat, 18 May 2013 00:46:05 +0200 From: Rudolf Marek User-Agent: Mozilla/5.0 (X11; Linux i686; rv:11.0) Gecko/20120310 Thunderbird/11.0 MIME-Version: 1.0 To: linux-i2c@vger.kernel.org, Paul Menzel Subject: [PATCH] i2c-piix4 - Add support for secondary SMBus on AMD SB800 and AMD FCH chipsets Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org Hello all, Attached patch adds support for secondary SMBus of AMD SB800 and new AMD FCH chipsets. The base address of secondary SMBus is different from SB700 and it is stored on similar place as SB800 primary SMBus. More verbose info: Probing function was just modified to read the SMBus base from address 0x28 or from original 0x2c. The secondary bus does not provide IRQ information. I think the SB700 has same secondary controller, so revision/IRQ information should not be printed too. This can be fixed in some other patch. Chipset datasheet can be found here: http://support.amd.com/us/Embedded_TechDocs/45482.pdf Tested on SB800 and FCH boards. Tested-by: Paul Menzel ASRock E350M1 with SB800 Signed-off-by: Rudolf Marek Thanks Rudolf diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c index 39ab78c..7145d3c 100644 --- a/drivers/i2c/busses/i2c-piix4.c +++ b/drivers/i2c/busses/i2c-piix4.c @@ -231,11 +231,11 @@ static int piix4_setup(struct pci_dev *PIIX4_dev, } static int piix4_setup_sb800(struct pci_dev *PIIX4_dev, - const struct pci_device_id *id) + const struct pci_device_id *id, u8 aux) { unsigned short piix4_smba; unsigned short smba_idx = 0xcd6; - u8 smba_en_lo, smba_en_hi, i2ccfg, i2ccfg_offset = 0x10, smb_en = 0x2c; + u8 smba_en_lo, smba_en_hi, i2ccfg, i2ccfg_offset = 0x10, smb_en; /* SB800 and later SMBus does not support forcing address */ if (force || force_addr) { @@ -245,6 +245,8 @@ static int piix4_setup_sb800(struct pci_dev *PIIX4_dev, } /* Determine the address of the SMBus areas */ + smb_en = (aux) ? 0x28 : 0x2c; + if (!request_region(smba_idx, 2, "smba_idx")) { dev_err(&PIIX4_dev->dev, "SMBus base address index region " "0x%x already in use!\n", smba_idx); @@ -272,6 +274,13 @@ static int piix4_setup_sb800(struct pci_dev *PIIX4_dev, return -EBUSY; } + /* Aux SMBus does not support IRQ information */ + if (aux) { + dev_info(&PIIX4_dev->dev, + "SMBus Host Controller at 0x%x\n", piix4_smba); + return piix4_smba; + } + /* Request the SMBus I2C bus config region */ if (!request_region(piix4_smba + i2ccfg_offset, 1, "i2ccfg")) { dev_err(&PIIX4_dev->dev, "SMBus I2C bus config region " @@ -596,7 +605,7 @@ static int piix4_probe(struct pci_dev *dev, const struct pci_device_id *id) dev->revision >= 0x40) || dev->vendor == PCI_VENDOR_ID_AMD) /* base address location etc changed in SB800 */ - retval = piix4_setup_sb800(dev, id); + retval = piix4_setup_sb800(dev, id, 0); else retval = piix4_setup(dev, id); @@ -610,17 +619,29 @@ static int piix4_probe(struct pci_dev *dev, const struct pci_device_id *id) return retval; /* Check for auxiliary SMBus on some AMD chipsets */ + retval = -ENODEV; + if (dev->vendor == PCI_VENDOR_ID_ATI && - dev->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS && - dev->revision < 0x40) { - retval = piix4_setup_aux(dev, id, 0x58); - if (retval > 0) { - /* Try to add the aux adapter if it exists, - * piix4_add_adapter will clean up if this fails */ - piix4_add_adapter(dev, retval, &piix4_aux_adapter); + dev->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS) { + if (dev->revision < 0x40) { + retval = piix4_setup_aux(dev, id, 0x58); + } else { + /* SB800 added aux bus too */ + retval = piix4_setup_sb800(dev, id, 1); } } + if (dev->vendor == PCI_VENDOR_ID_AMD && + dev->device == PCI_DEVICE_ID_AMD_HUDSON2_SMBUS) { + retval = piix4_setup_sb800(dev, id, 1); + } + + if (retval > 0) { + /* Try to add the aux adapter if it exists, + * piix4_add_adapter will clean up if this fails */ + piix4_add_adapter(dev, retval, &piix4_aux_adapter); + } + return 0; }