@@ -414,13 +414,13 @@ static void pci1xxxx_i2c_set_clear_FW_ACK(struct pci1xxxx_i2c *i2c, bool set)
writeb(regval, i2c->i2c_base + SMB_CORE_CTRL_REG_OFF);
}
-static void pci1xxxx_i2c_buffer_write(struct pci1xxxx_i2c *i2c, u8 slaveaddr,
+static void pci1xxxx_i2c_buffer_write(struct pci1xxxx_i2c *i2c, u8 clientaddr,
u8 transferlen, unsigned char *buf)
{
void __iomem *p = i2c->i2c_base + SMBUS_MST_BUF;
- if (slaveaddr)
- writeb(slaveaddr, p++);
+ if (clientaddr)
+ writeb(clientaddr, p++);
if (buf)
memcpy_toio(p, buf, transferlen);
@@ -775,7 +775,7 @@ static void pci1xxxx_i2c_clear_flags(struct pci1xxxx_i2c *i2c)
pci1xxxx_ack_high_level_intr(i2c, ALL_HIGH_LAYER_INTR);
}
-static int pci1xxxx_i2c_read(struct pci1xxxx_i2c *i2c, u8 slaveaddr,
+static int pci1xxxx_i2c_read(struct pci1xxxx_i2c *i2c, u8 clientaddr,
unsigned char *buf, u16 total_len)
{
void __iomem *p2 = i2c->i2c_base + SMB_CORE_COMPLETION_REG_OFF3;
@@ -799,10 +799,10 @@ static int pci1xxxx_i2c_read(struct pci1xxxx_i2c *i2c, u8 slaveaddr,
* The I2C transfer could be more than 128 bytes. Our Core is
* capable of only sending 128 at a time.
* As far as the I2C read is concerned, initailly send the
- * read slave address along with the number of bytes to read in
- * ReadCount. After sending the slave address the interrupt
- * is generated. On seeing the ACK for the slave address, reverse the
- * buffer direction and run the DMA to initiate Read from slave.
+ * read client address along with the number of bytes to read in
+ * ReadCount. After sending the client address the interrupt
+ * is generated. On seeing the ACK for the client address, reverse the
+ * buffer direction and run the DMA to initiate Read from client.
*/
for (count = 0; count < total_len; count += transferlen) {
@@ -836,8 +836,8 @@ static int pci1xxxx_i2c_read(struct pci1xxxx_i2c *i2c, u8 slaveaddr,
pci1xxxx_i2c_set_transfer_dir(i2c, I2C_DIRN_WRITE);
pci1xxxx_i2c_send_start_stop(i2c, 1);
- /* Write I2c buffer with just the slave addr. */
- pci1xxxx_i2c_buffer_write(i2c, slaveaddr, 0, NULL);
+ /* Write I2c buffer with just the client addr. */
+ pci1xxxx_i2c_buffer_write(i2c, clientaddr, 0, NULL);
/* Set the count. Readcount is the transfer bytes. */
pci1xxxx_i2c_set_count(i2c, 1, 1, transferlen);
@@ -872,7 +872,7 @@ static int pci1xxxx_i2c_read(struct pci1xxxx_i2c *i2c, u8 slaveaddr,
/* Read the completion reg to know the reason for DMA_TERM. */
regval = readb(p2);
- /* Slave did not respond. */
+ /* Client did not respond. */
if (regval & COMPLETION_MNAKX) {
writeb(COMPLETION_MNAKX, p2);
retval = -ETIMEDOUT;
@@ -896,7 +896,7 @@ static int pci1xxxx_i2c_read(struct pci1xxxx_i2c *i2c, u8 slaveaddr,
return retval;
}
-static int pci1xxxx_i2c_write(struct pci1xxxx_i2c *i2c, u8 slaveaddr,
+static int pci1xxxx_i2c_write(struct pci1xxxx_i2c *i2c, u8 clientaddr,
unsigned char *buf, u16 total_len)
{
void __iomem *p2 = i2c->i2c_base + SMB_CORE_COMPLETION_REG_OFF3;
@@ -934,14 +934,14 @@ static int pci1xxxx_i2c_write(struct pci1xxxx_i2c *i2c, u8 slaveaddr,
if (count == 0) {
pci1xxxx_i2c_send_start_stop(i2c, 1);
- /* -1 for the slave address. */
+ /* -1 for the client address. */
transferlen = min_t(u16, SMBUS_BUF_MAX_SIZE - 1,
remainingbytes);
- pci1xxxx_i2c_buffer_write(i2c, slaveaddr,
+ pci1xxxx_i2c_buffer_write(i2c, clientaddr,
transferlen, &buf[count]);
/*
* The actual number of bytes written on the I2C bus
- * is including the slave address.
+ * is including the client address.
*/
actualwritelen = transferlen + 1;
} else {
@@ -993,13 +993,13 @@ static int pci1xxxx_i2c_xfer(struct i2c_adapter *adap,
struct i2c_msg *msgs, int num)
{
struct pci1xxxx_i2c *i2c = i2c_get_adapdata(adap);
- u8 slaveaddr;
+ u8 clientaddr;
int retval;
u32 i;
i2c->i2c_xfer_in_progress = true;
for (i = 0; i < num; i++) {
- slaveaddr = i2c_8bit_addr_from_msg(&msgs[i]);
+ clientaddr = i2c_8bit_addr_from_msg(&msgs[i]);
/*
* Send the STOP bit if the transfer is the final one or
@@ -1016,10 +1016,10 @@ static int pci1xxxx_i2c_xfer(struct i2c_adapter *adap,
i2c->flags &= ~I2C_FLAGS_SMB_BLK_READ;
if (msgs[i].flags & I2C_M_RD)
- retval = pci1xxxx_i2c_read(i2c, slaveaddr,
+ retval = pci1xxxx_i2c_read(i2c, clientaddr,
msgs[i].buf, msgs[i].len);
else
- retval = pci1xxxx_i2c_write(i2c, slaveaddr,
+ retval = pci1xxxx_i2c_write(i2c, clientaddr,
msgs[i].buf, msgs[i].len);
if (retval < 0)
@@ -1048,7 +1048,7 @@ static u32 pci1xxxx_i2c_get_funcs(struct i2c_adapter *adap)
}
static const struct i2c_algorithm pci1xxxx_i2c_algo = {
- .master_xfer = pci1xxxx_i2c_xfer,
+ .xfer = pci1xxxx_i2c_xfer,
.functionality = pci1xxxx_i2c_get_funcs,
};
Match the wording of this driver wrt. the newest I2C v7, SMBus 3.2, I3C specifications and replace "master/slave" with more appropriate terms. They are also more specific because we distinguish now between a remote entity ("client") and a local one ("target"). Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> --- drivers/i2c/busses/i2c-mchp-pci1xxxx.c | 40 +++++++++++++------------- 1 file changed, 20 insertions(+), 20 deletions(-)