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[78.94.0.51]) by smtp.gmail.com with ESMTPSA id c7-20020a7bc847000000b0040836519dd9sm1453917wml.25.2023.11.09.01.23.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Nov 2023 01:23:33 -0800 (PST) From: Naresh Solanki To: Peter Rosin Cc: andi.shyti@kernel.org, robh@kernel.org, Patrick Rudolph , Naresh Solanki , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RESEND PATCH v5 2/2] i2c: muxes: pca954x: Enable features on MAX7357 Date: Thu, 9 Nov 2023 09:23:27 +0000 Message-ID: <20231109092328.3238241-2-naresh.solanki@9elements.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231109092328.3238241-1-naresh.solanki@9elements.com> References: <20231109092328.3238241-1-naresh.solanki@9elements.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org From: Patrick Rudolph Enable additional features based on DT settings and unconditionally release the shared interrupt pin after 1.6 seconds and allow to use it as reset. These features aren't enabled by default and it's up to board designer to validate for proper functioning and detection of devices in secondary bus as sometimes it can cause secondary bus being disabled. Signed-off-by: Patrick Rudolph Signed-off-by: Naresh Solanki --- Changes in V5: - Fix typos - Update comment - Add newline in dev_warn Changes in V4: - Drop max7358 - Update #define - Move conf variable - Print warning when I2C_FUNC_SMBUS_WRITE_BYTE_DATA isn't supported Changes in V3: - Delete unused #define - Update pca954x_init - Update commit message Changes in V2: - Update comments - Update check for DT properties --- drivers/i2c/muxes/i2c-mux-pca954x.c | 43 ++++++++++++++++++++++++++++- 1 file changed, 42 insertions(+), 1 deletion(-) diff --git a/drivers/i2c/muxes/i2c-mux-pca954x.c b/drivers/i2c/muxes/i2c-mux-pca954x.c index 2219062104fb..f5dfc33b97c0 100644 --- a/drivers/i2c/muxes/i2c-mux-pca954x.c +++ b/drivers/i2c/muxes/i2c-mux-pca954x.c @@ -57,6 +57,20 @@ #define PCA954X_IRQ_OFFSET 4 +/* + * MAX7357's configuration register is writeable after POR, but + * can be locked by setting the basic mode bit. MAX7358 configuration + * register is locked by default and needs to be unlocked first. + * The configuration register holds the following settings: + */ +#define MAX7357_CONF_INT_ENABLE BIT(0) +#define MAX7357_CONF_FLUSH_OUT BIT(1) +#define MAX7357_CONF_RELEASE_INT BIT(2) +#define MAX7357_CONF_DISCON_SINGLE_CHAN BIT(4) +#define MAX7357_CONF_PRECONNECT_TEST BIT(7) + +#define MAX7357_POR_DEFAULT_CONF MAX7357_CONF_INT_ENABLE + enum pca_type { max_7356, max_7357, @@ -470,7 +484,34 @@ static int pca954x_init(struct i2c_client *client, struct pca954x *data) else data->last_chan = 0; /* Disconnect multiplexer */ - ret = i2c_smbus_write_byte(client, data->last_chan); + if (device_is_compatible(&client->dev, "maxim,max7357")) { + if (i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { + u8 conf = MAX7357_POR_DEFAULT_CONF; + /* + * The interrupt signal is shared with the reset pin. Release the + * interrupt after 1.6 seconds to allow using the pin as reset. + */ + conf |= MAX7357_CONF_RELEASE_INT; + + if (device_property_read_bool(&client->dev, "maxim,isolate-stuck-channel")) + conf |= MAX7357_CONF_DISCON_SINGLE_CHAN; + if (device_property_read_bool(&client->dev, + "maxim,send-flush-out-sequence")) + conf |= MAX7357_CONF_FLUSH_OUT; + if (device_property_read_bool(&client->dev, + "maxim,preconnection-wiggle-test-enable")) + conf |= MAX7357_CONF_PRECONNECT_TEST; + + ret = i2c_smbus_write_byte_data(client, data->last_chan, conf); + } else { + dev_warn(&client->dev, "Write byte data not supported." + "Cannot enable enhanced mode features\n"); + ret = i2c_smbus_write_byte(client, data->last_chan); + } + } else { + ret = i2c_smbus_write_byte(client, data->last_chan); + } + if (ret < 0) data->last_chan = 0;