From patchwork Fri Jul 31 12:00:34 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert ABEL X-Patchwork-Id: 502512 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 0510A1402F4 for ; Fri, 31 Jul 2015 22:07:25 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751174AbbGaMHX (ORCPT ); Fri, 31 Jul 2015 08:07:23 -0400 Received: from smarthost.TechFak.Uni-Bielefeld.DE ([129.70.137.17]:44785 "EHLO smarthost.TechFak.Uni-Bielefeld.DE" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751180AbbGaMHW (ORCPT ); Fri, 31 Jul 2015 08:07:22 -0400 Received: from knoppers.TechFak.Uni-Bielefeld.DE (knoppers.TechFak.Uni-Bielefeld.DE [129.70.129.230]) (Authenticated sender: rabel) by smarthost.TechFak.Uni-Bielefeld.DE (Postfix) with ESMTPA id 01F4D80035; Fri, 31 Jul 2015 14:00:44 +0200 (CEST) From: Robert ABEL To: wsa@the-dreams.de, linux-i2c@vger.kernel.org Cc: michal.simek@xilinx.com, Robert ABEL Subject: [PATCH 6/6] i2c: Xilinx IIC: add DT Endianness support Date: Fri, 31 Jul 2015 14:00:34 +0200 Message-Id: <1438344034-20211-8-git-send-email-rabel@cit-ec.uni-bielefeld.de> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1438344034-20211-1-git-send-email-rabel@cit-ec.uni-bielefeld.de> References: <1438344034-20211-1-git-send-email-rabel@cit-ec.uni-bielefeld.de> Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org Signed-off-by: Robert ABEL --- drivers/i2c/busses/i2c-xiic.c | 38 ++++++++++++++++++++++++++++++++++++-- 1 file changed, 36 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/busses/i2c-xiic.c b/drivers/i2c/busses/i2c-xiic.c index 6a834bc..ab040a5 100644 --- a/drivers/i2c/busses/i2c-xiic.c +++ b/drivers/i2c/busses/i2c-xiic.c @@ -76,6 +76,8 @@ enum xilinx_i2c_reason { * @state: Current controller state * @reasons: Reason for entering STATE_ERROR. * Only valid while in STATE_ERROR. + * @getreg32: Register Read function, respects DT endianness. + * @setreg32: Register Write function, respects DT endianness. */ struct xiic_i2c { void __iomem * base; @@ -87,6 +89,8 @@ struct xiic_i2c { unsigned int nmsgs; enum xilinx_i2c_state state; enum xilinx_i2c_reason reason; + u32 (*getreg32)(const volatile void __iomem *addr); + void (*setreg32)(u32 value, volatile void __iomem *addr); }; @@ -175,8 +179,28 @@ struct xiic_i2c { static void xiic_enqueue_msg(struct xiic_i2c *i2c); #define xiic_msg_space(i2c) ((i2c)->msg->len - (i2c)->pos) -#define xiic_getreg32(i2c, reg) ioread32(i2c->base + reg) -#define xiic_setreg32(i2c, reg, value) iowrite32(value, i2c->base + reg) +#define xiic_getreg32(i2c, reg) (i2c->getreg32(i2c->base + reg)) +#define xiic_setreg32(i2c, reg, value) (i2c->setreg32(value, i2c->base + reg)) + +static u32 xiic_getreg32le(const volatile void __iomem *addr) +{ + return ioread32(addr); +} + +static void xiic_setreg32le(u32 value, volatile void __iomem *addr) +{ + iowrite32(value, addr); +} + +static u32 xiic_getreg32be(const volatile void __iomem *addr) +{ + return ioread32be(addr); +} + +static void xiic_setreg32be(u32 value, volatile void __iomem *addr) +{ + iowrite32be(value, addr); +} static inline void xiic_irq_dis(struct xiic_i2c *i2c, u32 mask) { @@ -1114,6 +1138,16 @@ static int xiic_i2c_probe(struct platform_device *pdev) dev_err(&pdev->dev, "Cannot claim IRQ\n"); return ret; } + + i2c->getreg32 = xiic_getreg32le; + i2c->setreg32 = xiic_setreg32le; + +#if defined(CONFIG_OF) + if (of_device_is_big_endian(pdev->dev.of_node)) { + i2c->getreg32 = xiic_getreg32be; + i2c->setreg32 = xiic_setreg32be; + } +#endif xiic_reinit(i2c);