From patchwork Tue Feb 17 18:52:08 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Hesselbarth X-Patchwork-Id: 440682 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 900D014017C for ; Wed, 18 Feb 2015 05:53:37 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752862AbbBQSwk (ORCPT ); Tue, 17 Feb 2015 13:52:40 -0500 Received: from mail-we0-f180.google.com ([74.125.82.180]:34533 "EHLO mail-we0-f180.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752784AbbBQSwi (ORCPT ); Tue, 17 Feb 2015 13:52:38 -0500 Received: by wesq59 with SMTP id q59so249997wes.1; Tue, 17 Feb 2015 10:52:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=jXnCUm0Hsk/SayPOgEXljnxz2QGO2D5N+tvTSZBz0j4=; b=MPpOMMkTY6oGUXvuJzhT0hBNLNX2g4QsL+Ym7Q1q0/Hsnr28/7rGFojQgiveC+cTXB FH/A/QHvSN0dHBhCb2gZywH1z+TymJ692tMHxxzGOFkKglbEq+5hDfn2ejaHPPp0DhMc f1z4EnYnyA0q3l+je+DVMHjrDPmCPy/Cc35svuHrTv8YDPqcKzA7Ybzm1Y8KHhegmufQ bK2ls0FNdMZIJHy0qCQL2fQNuYyw+RfQKGh+DFwfVXuRW5b6sdJJSUyU+qZs/6X9T9Yt 8lRbcnTGhriHEB8LXPyS3JkV8sXeVBIbFZr8iD/bwOqWYcBcn+F+LnDQ1N0uaVOjMKsT Afog== X-Received: by 10.180.84.166 with SMTP id a6mr2919822wiz.4.1424199157173; Tue, 17 Feb 2015 10:52:37 -0800 (PST) Received: from topkick.lan (f051045211.adsl.alicedsl.de. [78.51.45.211]) by mx.google.com with ESMTPSA id er13sm28631945wjc.11.2015.02.17.10.52.35 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 17 Feb 2015 10:52:36 -0800 (PST) From: Sebastian Hesselbarth To: Sebastian Hesselbarth Cc: Jason Cooper , Andrew Lunn , Gregory Clement , Gabriel Dobato , Wolfram Sang , Stephen Warren , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 7/8] ARM: dts: dove: Add internal i2c multiplexer node Date: Tue, 17 Feb 2015 19:52:08 +0100 Message-Id: <1424199129-22099-8-git-send-email-sebastian.hesselbarth@gmail.com> In-Reply-To: <1424199129-22099-1-git-send-email-sebastian.hesselbarth@gmail.com> References: <1424199129-22099-1-git-send-email-sebastian.hesselbarth@gmail.com> Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org This adds a i2c-mux-pinctrl node to dove.dtsi for the internal i2c mux found on Dove SoCs. Up to now, we had no board using any of the two additional i2c busses, so make sure the change does not break any existing boards. Therefore, we rename the i2c-controller node label to "i2c" and enable it by default. Also, the dedicated sub-bus (now "i2c0") is enabled by default. The two optional sub-busses require additional external pin-muxing, so disable them by default. Signed-off-by: Sebastian Hesselbarth Acked-by: Gregory CLEMENT --- Wolfram, Actually, I was hoping that default pin hog mechanism (pinctrl-names = "default") could also be used from i2c mux nodes and devices. Anyway, I had a look at i2c-core/mux code and failed how to achieve that easily. Instead I decided, it would also be ok to put the pin hog into the i2c controller node where pins will be bound by standard platform device code. Cc: Jason Cooper Cc: Andrew Lunn Cc: Gregory Clement Cc: Gabriel Dobato Cc: Wolfram Sang Cc: Stephen Warren Cc: linux-i2c@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org --- arch/arm/boot/dts/dove.dtsi | 40 ++++++++++++++++++++++++++++++++++++++-- 1 file changed, 38 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi index 9ad829523a13..b3340e862b0e 100644 --- a/arch/arm/boot/dts/dove.dtsi +++ b/arch/arm/boot/dts/dove.dtsi @@ -28,6 +28,42 @@ }; }; + i2c-mux { + compatible = "i2c-mux-pinctrl"; + #address-cells = <1>; + #size-cells = <0>; + + i2c-parent = <&i2c>; + + pinctrl-names = "i2c0", "i2c1", "i2c2"; + pinctrl-0 = <&pmx_i2cmux_0>; + pinctrl-1 = <&pmx_i2cmux_1>; + pinctrl-2 = <&pmx_i2cmux_2>; + + i2c0: i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + }; + + i2c1: i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + /* Requires pmx_i2c1 on i2c controller node */ + status = "disabled"; + }; + + i2c2: i2c@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + /* Requires pmx_i2c2 on i2c controller node */ + status = "disabled"; + }; + }; + l2: l2-cache { compatible = "marvell,tauros2-cache"; marvell,tauros2-cache-features = <0>; @@ -123,7 +159,7 @@ status = "disabled"; }; - i2c0: i2c-ctrl@11000 { + i2c: i2c-ctrl@11000 { compatible = "marvell,mv64xxx-i2c"; reg = <0x11000 0x20>; #address-cells = <1>; @@ -132,7 +168,7 @@ clock-frequency = <400000>; timeout-ms = <1000>; clocks = <&core_clk 0>; - status = "disabled"; + status = "okay"; }; uart0: serial@12000 {