From patchwork Wed Aug 7 09:05:42 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jingchang Lu X-Patchwork-Id: 265456 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id DC1D42C0219 for ; Wed, 7 Aug 2013 19:59:22 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932223Ab3HGJ7W (ORCPT ); Wed, 7 Aug 2013 05:59:22 -0400 Received: from co1ehsobe003.messaging.microsoft.com ([216.32.180.186]:57810 "EHLO co1outboundpool.messaging.microsoft.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932166Ab3HGJ7V (ORCPT ); Wed, 7 Aug 2013 05:59:21 -0400 Received: from mail199-co1-R.bigfish.com (10.243.78.230) by CO1EHSOBE009.bigfish.com (10.243.66.72) with Microsoft SMTP Server id 14.1.225.22; Wed, 7 Aug 2013 09:59:21 +0000 Received: from mail199-co1 (localhost [127.0.0.1]) by mail199-co1-R.bigfish.com (Postfix) with ESMTP id 2B0DE580221; Wed, 7 Aug 2013 09:59:21 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 0 X-BigFish: VS0(zzzz1f42h208ch1ee6h1de0h1fdah2073h1202h1e76h1d1ah1d2ah1fc6hzz1de098h8275bh1de097hz2dh2a8h668h839hd24he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1b2fh1fb3h1d0ch1d2eh1d3fh1dfeh1dffh1e23h1155h) Received: from mail199-co1 (localhost.localdomain [127.0.0.1]) by mail199-co1 (MessageSwitch) id 1375869559521038_18605; Wed, 7 Aug 2013 09:59:19 +0000 (UTC) Received: from CO1EHSMHS003.bigfish.com (unknown [10.243.78.229]) by mail199-co1.bigfish.com (Postfix) with ESMTP id 7B672B0004A; Wed, 7 Aug 2013 09:59:19 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CO1EHSMHS003.bigfish.com (10.243.66.13) with Microsoft SMTP Server (TLS) id 14.16.227.3; Wed, 7 Aug 2013 09:59:19 +0000 Received: from tx30smr01.am.freescale.net (10.81.153.31) by 039-SN1MMR1-004.039d.mgd.msft.net (10.84.1.14) with Microsoft SMTP Server (TLS) id 14.3.136.1; Wed, 7 Aug 2013 09:59:18 +0000 Received: from rock.am.freescale.net (rock.ap.freescale.net [10.193.20.106]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id r779wqx9022506; Wed, 7 Aug 2013 02:59:15 -0700 From: Jingchang Lu To: CC: , , , , , Jingchang Lu Subject: [PATCH 7/8] i2c: imx: add struct to hold more configurable quirks Date: Wed, 7 Aug 2013 17:05:42 +0800 Message-ID: <1375866343-2074-7-git-send-email-b35083@freescale.com> X-Mailer: git-send-email 1.8.0 In-Reply-To: <1375866343-2074-1-git-send-email-b35083@freescale.com> References: <1375866343-2074-1-git-send-email-b35083@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-FOPE-CONNECTOR: Id%0$Dn%*$RO%0$TLS%0$FQDN%$TlsDn% Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org This add struct imx_i2c_hwdata to hold more quirks data which may vary between SoCs, thus the driver can operate on more differences to support more SoCs. Signed-off-by: Jingchang Lu --- drivers/i2c/busses/i2c-imx.c | 77 ++++++++++++++++++++++++++++++-------------- 1 file changed, 52 insertions(+), 25 deletions(-) diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c index dc9f2ec..ce31196 100644 --- a/drivers/i2c/busses/i2c-imx.c +++ b/drivers/i2c/busses/i2c-imx.c @@ -108,9 +108,6 @@ #define I2CR_IEN_OPCODE_0 0x0 #define I2CR_IEN_OPCODE_1 I2CR_IEN -#define IMX_I2SR_CLR_OPCODE I2SR_CLR_OPCODE_W0C -#define IMX_I2CR_IEN_OPCODE I2CR_IEN_OPCODE_1 - /** Variables ****************************************************************** *******************************************************************************/ @@ -127,7 +124,7 @@ struct imx_i2c_clk_pair { u16 val; }; -static struct imx_i2c_clk_pair __initdata i2c_clk_div[] = { +static struct imx_i2c_clk_pair imx_i2c_clk_div[] = { { 22, 0x20 }, { 24, 0x21 }, { 26, 0x22 }, { 28, 0x23 }, { 30, 0x00 }, { 32, 0x24 }, { 36, 0x25 }, { 40, 0x26 }, { 42, 0x03 }, { 44, 0x27 }, { 48, 0x28 }, { 52, 0x05 }, @@ -148,6 +145,15 @@ enum imx_i2c_type { IMX21_I2C, }; +struct imx_i2c_hwdata { + enum imx_i2c_type devtype; + unsigned regshift; + struct imx_i2c_clk_pair *clk_div; + unsigned ndivs; + unsigned i2sr_clr_opcode; + unsigned i2cr_ien_opcode; +}; + struct imx_i2c_struct { struct i2c_adapter adapter; struct clk *clk; @@ -157,16 +163,36 @@ struct imx_i2c_struct { unsigned int disable_delay; int stopped; unsigned int ifdr; /* IMX_I2C_IFDR */ - enum imx_i2c_type devtype; + const struct imx_i2c_hwdata *hwdata; +}; + +static const struct imx_i2c_hwdata imx1_i2c_hwdata = { + .devtype = IMX1_I2C, + .regshift = IMX_I2C_REGSHIFT, + .clk_div = imx_i2c_clk_div, + .ndivs = ARRAY_SIZE(imx_i2c_clk_div), + .i2sr_clr_opcode = I2SR_CLR_OPCODE_W0C, + .i2cr_ien_opcode = I2CR_IEN_OPCODE_1, + +}; + +static const struct imx_i2c_hwdata imx21_i2c_hwdata = { + .devtype = IMX21_I2C, + .regshift = IMX_I2C_REGSHIFT, + .clk_div = imx_i2c_clk_div, + .ndivs = ARRAY_SIZE(imx_i2c_clk_div), + .i2sr_clr_opcode = I2SR_CLR_OPCODE_W0C, + .i2cr_ien_opcode = I2CR_IEN_OPCODE_1, + }; static struct platform_device_id imx_i2c_devtype[] = { { .name = "imx1-i2c", - .driver_data = IMX1_I2C, + .driver_data = (kernel_ulong_t)&imx1_i2c_hwdata, }, { .name = "imx21-i2c", - .driver_data = IMX21_I2C, + .driver_data = (kernel_ulong_t)&imx21_i2c_hwdata, }, { /* sentinel */ } @@ -174,27 +200,27 @@ static struct platform_device_id imx_i2c_devtype[] = { MODULE_DEVICE_TABLE(platform, imx_i2c_devtype); static const struct of_device_id i2c_imx_dt_ids[] = { - { .compatible = "fsl,imx1-i2c", .data = &imx_i2c_devtype[IMX1_I2C], }, - { .compatible = "fsl,imx21-i2c", .data = &imx_i2c_devtype[IMX21_I2C], }, + { .compatible = "fsl,imx1-i2c", .data = &imx1_i2c_hwdata, }, + { .compatible = "fsl,imx21-i2c", .data = &imx21_i2c_hwdata, }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, i2c_imx_dt_ids); static inline int is_imx1_i2c(struct imx_i2c_struct *i2c_imx) { - return i2c_imx->devtype == IMX1_I2C; + return i2c_imx->hwdata->devtype == IMX1_I2C; } static inline void imx_i2c_write_reg(unsigned int val, struct imx_i2c_struct *i2c_imx, unsigned int reg) { - writeb(val, i2c_imx->base + (reg << IMX_I2C_REGSHIFT)); + writeb(val, i2c_imx->base + (reg << i2c_imx->hwdata->regshift)); } static inline unsigned char imx_i2c_read_reg(struct imx_i2c_struct *i2c_imx, unsigned int reg) { - return readb(i2c_imx->base + (reg << IMX_I2C_REGSHIFT)); + return readb(i2c_imx->base + (reg << i2c_imx->hwdata->regshift)); } /** Functions for IMX I2C adapter driver *************************************** @@ -258,8 +284,8 @@ static int i2c_imx_start(struct imx_i2c_struct *i2c_imx) clk_prepare_enable(i2c_imx->clk); imx_i2c_write_reg(i2c_imx->ifdr, i2c_imx, IMX_I2C_IFDR); /* Enable I2C controller */ - imx_i2c_write_reg(IMX_I2SR_CLR_OPCODE, i2c_imx, IMX_I2C_I2SR); - imx_i2c_write_reg(IMX_I2CR_IEN_OPCODE, i2c_imx, IMX_I2C_I2CR); + imx_i2c_write_reg(i2c_imx->hwdata->i2sr_clr_opcode, i2c_imx, IMX_I2C_I2SR); + imx_i2c_write_reg(i2c_imx->hwdata->i2cr_ien_opcode, i2c_imx, IMX_I2C_I2CR); /* Wait controller to be stable */ udelay(50); @@ -303,13 +329,15 @@ static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx) } /* Disable I2C controller */ - imx_i2c_write_reg(IMX_I2CR_IEN_OPCODE ^ I2CR_IEN, i2c_imx, IMX_I2C_I2CR); + temp = i2c_imx->hwdata->i2cr_ien_opcode ^ I2CR_IEN, + imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); clk_disable_unprepare(i2c_imx->clk); } static void __init i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx, unsigned int rate) { + struct imx_i2c_clk_pair *i2c_clk_div = i2c_imx->hwdata->clk_div; unsigned int i2c_clk_rate; unsigned int div; int i; @@ -319,8 +347,8 @@ static void __init i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx, div = (i2c_clk_rate + rate - 1) / rate; if (div < i2c_clk_div[0].div) i = 0; - else if (div > i2c_clk_div[ARRAY_SIZE(i2c_clk_div) - 1].div) - i = ARRAY_SIZE(i2c_clk_div) - 1; + else if (div > i2c_clk_div[i2c_imx->hwdata->ndivs - 1].div) + i = i2c_imx->hwdata->ndivs - 1; else for (i = 0; i2c_clk_div[i].div < div; i++); @@ -355,7 +383,7 @@ static irqreturn_t i2c_imx_isr(int irq, void *dev_id) /* save status register */ i2c_imx->i2csr = temp; temp &= ~I2SR_IIF; - temp |= (IMX_I2SR_CLR_OPCODE & I2SR_IIF); + temp |= (i2c_imx->hwdata->i2sr_clr_opcode & I2SR_IIF); imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2SR); wake_up(&i2c_imx->queue); return IRQ_HANDLED; @@ -537,7 +565,6 @@ static int __init i2c_imx_probe(struct platform_device *pdev) struct imx_i2c_struct *i2c_imx; struct resource *res; struct imxi2c_platform_data *pdata = pdev->dev.platform_data; - const struct platform_device_id *imx_id; void __iomem *base; int irq, ret; u32 bitrate; @@ -563,11 +590,10 @@ static int __init i2c_imx_probe(struct platform_device *pdev) } if (of_id) - imx_id = of_id->data; + i2c_imx->hwdata = of_id->data; else - imx_id = platform_get_device_id(pdev); - - i2c_imx->devtype = imx_id->driver_data; + i2c_imx->hwdata = (struct imx_i2c_hwdata *) + platform_get_device_id(pdev)->driver_data; /* Setup i2c_imx driver structure */ strlcpy(i2c_imx->adapter.name, pdev->name, sizeof(i2c_imx->adapter.name)); @@ -613,8 +639,9 @@ static int __init i2c_imx_probe(struct platform_device *pdev) i2c_imx_set_clk(i2c_imx, bitrate); /* Set up chip registers to defaults */ - imx_i2c_write_reg(IMX_I2CR_IEN_OPCODE ^ I2CR_IEN, i2c_imx, IMX_I2C_I2CR); - imx_i2c_write_reg(IMX_I2SR_CLR_OPCODE, i2c_imx, IMX_I2C_I2SR); + imx_i2c_write_reg(i2c_imx->hwdata->i2cr_ien_opcode ^ I2CR_IEN, + i2c_imx, IMX_I2C_I2CR); + imx_i2c_write_reg(i2c_imx->hwdata->i2sr_clr_opcode, i2c_imx, IMX_I2C_I2SR); /* Add I2C adapter */ ret = i2c_add_numbered_adapter(&i2c_imx->adapter);