From patchwork Fri Sep 1 07:34:10 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Yves MORDRET X-Patchwork-Id: 808558 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-i2c-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3xk9zP0ZTcz9s81 for ; Fri, 1 Sep 2017 17:36:33 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751833AbdIAHgN (ORCPT ); Fri, 1 Sep 2017 03:36:13 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:11984 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751395AbdIAHfY (ORCPT ); Fri, 1 Sep 2017 03:35:24 -0400 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id v817YElj017896; Fri, 1 Sep 2017 09:34:32 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2cq184gtbc-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 01 Sep 2017 09:34:32 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 2E74531; Fri, 1 Sep 2017 07:34:30 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag5node2.st.com [10.75.127.14]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id F41FEE39; Fri, 1 Sep 2017 07:34:29 +0000 (GMT) Received: from localhost (10.75.127.47) by SFHDAG5NODE2.st.com (10.75.127.14) with Microsoft SMTP Server (TLS) id 15.0.1178.4; Fri, 1 Sep 2017 09:34:29 +0200 From: Pierre-Yves MORDRET To: Wolfram Sang , Rob Herring , Mark Rutland , Maxime Coquelin , Alexandre Torgue , Russell King , , , , CC: Pierre-Yves MORDRET Subject: [RESEND PATCH v3 0/5] Add support for the STM32F7 I2C Date: Fri, 1 Sep 2017 09:34:10 +0200 Message-ID: <1504251255-20469-1-git-send-email-pierre-yves.mordret@st.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-Originating-IP: [10.75.127.47] X-ClientProxiedBy: SFHDAG5NODE3.st.com (10.75.127.15) To SFHDAG5NODE2.st.com (10.75.127.14) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-09-01_02:, , signatures=0 Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org This patchset adds support for the I2C controller embedded in STM32F7xx SoC. It enables I2C transfer in interrupt mode with Standard-mode, Fast-mode and Fast-mode+ bus speed. --- Version history: v3: * Move stm32f7_i2c_match above stm32f7_i2c_driver * of_device_get_match_data instead of of_match_device * Improve I2C Speed DT gathering * dev_err into dev_dbg for Arbitration loss * Remove useless space aligned v2: * Implement an I2C timings computation algorithm instead of static values(bindings). Algorithm uses generic I2C SCL Falling/Rising bindings and System clock to compute its timings. * I2C Device Tree Update --- Pierre-Yves MORDRET (5): dt-bindings: i2c-stm32: Document the STM32F7 I2C bindings i2c: i2c-stm32f4: use generic definition of speed enum i2c: i2c-stm32f7: add driver ARM: dts: stm32: Add I2C1 support for STM32F746 SoC ARM: dts: stm32: Add I2C1 support for STM32F746 eval board .../devicetree/bindings/i2c/i2c-stm32.txt | 29 +- arch/arm/boot/dts/stm32746g-eval.dts | 8 + arch/arm/boot/dts/stm32f746.dtsi | 22 + drivers/i2c/busses/Kconfig | 10 + drivers/i2c/busses/Makefile | 1 + drivers/i2c/busses/i2c-stm32.h | 20 + drivers/i2c/busses/i2c-stm32f4.c | 18 +- drivers/i2c/busses/i2c-stm32f7.c | 974 +++++++++++++++++++++ 8 files changed, 1068 insertions(+), 14 deletions(-) create mode 100644 drivers/i2c/busses/i2c-stm32.h create mode 100644 drivers/i2c/busses/i2c-stm32f7.c