From patchwork Tue Mar 21 22:43:07 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julia Cartwright X-Patchwork-Id: 741789 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3vnqWw2Bx9z9s2x for ; Wed, 22 Mar 2017 10:58:20 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933430AbdCUX5o (ORCPT ); Tue, 21 Mar 2017 19:57:44 -0400 Received: from mx0a-00010702.pphosted.com ([148.163.156.75]:57790 "EHLO mx0b-00010702.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S933403AbdCUX5m (ORCPT ); Tue, 21 Mar 2017 19:57:42 -0400 Received: from pps.filterd (m0098780.ppops.net [127.0.0.1]) by mx0a-00010702.pphosted.com (8.16.0.20/8.16.0.20) with SMTP id v2LMYdB7029937; Tue, 21 Mar 2017 17:44:37 -0500 Received: from ni.com (skprod3.natinst.com [130.164.80.24]) by mx0a-00010702.pphosted.com with ESMTP id 29bd3b80x6-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 21 Mar 2017 17:44:36 -0500 Received: from us-aus-exhub2.ni.corp.natinst.com (us-aus-exhub2.ni.corp.natinst.com [130.164.68.32]) by us-aus-skprod3.natinst.com (8.16.0.17/8.16.0.17) with ESMTPS id v2LMeP3x010879 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Tue, 21 Mar 2017 17:44:35 -0500 Received: from us-aus-exhub2.ni.corp.natinst.com (130.164.68.32) by us-aus-exhub2.ni.corp.natinst.com (130.164.68.32) with Microsoft SMTP Server (TLS) id 15.0.1156.6; Tue, 21 Mar 2017 17:43:12 -0500 Received: from jcartwri.amer.corp.natinst.com (130.164.49.7) by us-aus-exhub2.ni.corp.natinst.com (130.164.68.32) with Microsoft SMTP Server id 15.0.1156.6 via Frontend Transport; Tue, 21 Mar 2017 17:43:12 -0500 Received: by jcartwri.amer.corp.natinst.com (Postfix, from userid 1000) id 4E28D3000E8; Tue, 21 Mar 2017 17:43:12 -0500 (CDT) From: Julia Cartwright To: William Breathitt Gray , Linus Walleij , Alexandre Courbot CC: , , Subject: [PATCH v2 7/9] gpio: 104-idi-48: make use of raw_spinlock variants Date: Tue, 21 Mar 2017 17:43:07 -0500 Message-ID: X-Mailer: git-send-email 2.12.0 In-Reply-To: References: MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-03-21_20:, , signatures=0 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1702020001 definitions=main-1703210190 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-03-21_20:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_policy_notspam policy=outbound_policy score=30 priorityscore=1501 malwarescore=0 suspectscore=2 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=30 reason=mlx scancount=1 engine=8.0.1-1702020001 definitions=main-1703210190 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The 104-idi-48 gpio driver currently implements an irq_chip for handling interrupts; due to how irq_chip handling is done, it's necessary for the irq_chip methods to be invoked from hardirq context, even on a a real-time kernel. Because the spinlock_t type becomes a "sleeping" spinlock w/ RT kernels, it is not suitable to be used with irq_chips. A quick audit of the operations under the lock reveal that they do only minimal, bounded work, and are therefore safe to do under a raw spinlock. Signed-off-by: Julia Cartwright Acked-by: William Breathitt Gray --- New patch as of v2 of series. drivers/gpio/gpio-104-idi-48.c | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/drivers/gpio/gpio-104-idi-48.c b/drivers/gpio/gpio-104-idi-48.c index 568375a7ebc2..337c048168d8 100644 --- a/drivers/gpio/gpio-104-idi-48.c +++ b/drivers/gpio/gpio-104-idi-48.c @@ -51,7 +51,7 @@ MODULE_PARM_DESC(irq, "ACCES 104-IDI-48 interrupt line numbers"); */ struct idi_48_gpio { struct gpio_chip chip; - spinlock_t lock; + raw_spinlock_t lock; spinlock_t ack_lock; unsigned char irq_mask[6]; unsigned base; @@ -112,11 +112,12 @@ static void idi_48_irq_mask(struct irq_data *data) if (!idi48gpio->irq_mask[boundary]) { idi48gpio->cos_enb &= ~BIT(boundary); - spin_lock_irqsave(&idi48gpio->lock, flags); + raw_spin_lock_irqsave(&idi48gpio->lock, flags); outb(idi48gpio->cos_enb, idi48gpio->base + 7); - spin_unlock_irqrestore(&idi48gpio->lock, flags); + raw_spin_unlock_irqrestore(&idi48gpio->lock, + flags); } return; @@ -145,11 +146,12 @@ static void idi_48_irq_unmask(struct irq_data *data) if (!prev_irq_mask) { idi48gpio->cos_enb |= BIT(boundary); - spin_lock_irqsave(&idi48gpio->lock, flags); + raw_spin_lock_irqsave(&idi48gpio->lock, flags); outb(idi48gpio->cos_enb, idi48gpio->base + 7); - spin_unlock_irqrestore(&idi48gpio->lock, flags); + raw_spin_unlock_irqrestore(&idi48gpio->lock, + flags); } return; @@ -186,11 +188,11 @@ static irqreturn_t idi_48_irq_handler(int irq, void *dev_id) spin_lock(&idi48gpio->ack_lock); - spin_lock(&idi48gpio->lock); + raw_spin_lock(&idi48gpio->lock); cos_status = inb(idi48gpio->base + 7); - spin_unlock(&idi48gpio->lock); + raw_spin_unlock(&idi48gpio->lock); /* IRQ Status (bit 6) is active low (0 = IRQ generated by device) */ if (cos_status & BIT(6)) { @@ -256,7 +258,7 @@ static int idi_48_probe(struct device *dev, unsigned int id) idi48gpio->chip.get = idi_48_gpio_get; idi48gpio->base = base[id]; - spin_lock_init(&idi48gpio->lock); + raw_spin_lock_init(&idi48gpio->lock); spin_lock_init(&idi48gpio->ack_lock); err = devm_gpiochip_add_data(dev, &idi48gpio->chip, idi48gpio);