From patchwork Wed Oct 19 09:15:27 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 684181 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3szb8f4tv7z9srZ for ; Thu, 20 Oct 2016 02:14:58 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S944056AbcJSPOy (ORCPT ); Wed, 19 Oct 2016 11:14:54 -0400 Received: from up.free-electrons.com ([163.172.77.33]:33202 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S942835AbcJSPOw (ORCPT ); Wed, 19 Oct 2016 11:14:52 -0400 Received: by mail.free-electrons.com (Postfix, from userid 110) id 2E2E1228F3; Wed, 19 Oct 2016 11:15:29 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 0324E221E9; Wed, 19 Oct 2016 11:15:28 +0200 (CEST) From: Maxime Ripard To: Linus Walleij , Alexandre Courbot Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, Rob Herring , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH 2/2] ARM: sunxi: Add the missing clocks to the pinctrl nodes Date: Wed, 19 Oct 2016 11:15:27 +0200 Message-Id: <8e58bedc1d25f7fe94497d6ac123f3d4bbfd4c69.1476868462.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: References: In-Reply-To: References: Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The pin controllers also use the two oscillators for debouncing. Add them to the DTs. Signed-off-by: Maxime Ripard Acked-by: Linus Walleij --- arch/arm/boot/dts/sun4i-a10.dtsi | 3 ++- arch/arm/boot/dts/sun5i.dtsi | 3 ++- arch/arm/boot/dts/sun6i-a31.dtsi | 3 ++- arch/arm/boot/dts/sun7i-a20.dtsi | 3 ++- arch/arm/boot/dts/sun8i-a23-a33.dtsi | 3 ++- arch/arm/boot/dts/sun8i-h3.dtsi | 3 ++- arch/arm/boot/dts/sun9i-a80.dtsi | 3 ++- 7 files changed, 14 insertions(+), 7 deletions(-) diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index 7e7dfc2b43db..b14a4281058d 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i-a10.dtsi @@ -967,7 +967,8 @@ compatible = "allwinner,sun4i-a10-pinctrl"; reg = <0x01c20800 0x400>; interrupts = <28>; - clocks = <&apb0_gates 5>; + clocks = <&apb0_gates 5>, <&osc24M>, <&osc32k>; + clock-names = "apb", "hosc", "losc"; gpio-controller; interrupt-controller; #interrupt-cells = <3>; diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi index e374f4fc8073..485cdbae2b68 100644 --- a/arch/arm/boot/dts/sun5i.dtsi +++ b/arch/arm/boot/dts/sun5i.dtsi @@ -547,7 +547,8 @@ pio: pinctrl@01c20800 { reg = <0x01c20800 0x400>; interrupts = <28>; - clocks = <&apb0_gates 5>; + clocks = <&apb0_gates 5>, <&osc24M>, <&osc32k>; + clock-names = "apb", "hosc", "losc"; gpio-controller; interrupt-controller; #interrupt-cells = <3>; diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index c1b891e75f18..efd61c65fd19 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi @@ -428,7 +428,8 @@ , , ; - clocks = <&ccu CLK_APB1_PIO>; + clocks = <&ccu CLK_APB1_PIO>, <&osc24M>, <&osc32k>; + clock-names = "apb", "hosc", "losc"; gpio-controller; interrupt-controller; #interrupt-cells = <3>; diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index 94cf5a1c7172..f7db067b0de0 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -1085,7 +1085,8 @@ compatible = "allwinner,sun7i-a20-pinctrl"; reg = <0x01c20800 0x400>; interrupts = ; - clocks = <&apb0_gates 5>; + clocks = <&apb0_gates 5>, <&osc24M>, <&osc32k>; + clock-names = "apb", "hosc", "losc"; gpio-controller; interrupt-controller; #interrupt-cells = <3>; diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi index 48fc24f36fcb..b0b6e9ba2501 100644 --- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi +++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi @@ -266,7 +266,8 @@ /* compatible gets set in SoC specific dtsi file */ reg = <0x01c20800 0x400>; /* interrupts get set in SoC specific dtsi file */ - clocks = <&ccu CLK_BUS_PIO>; + clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>; + clock-names = "apb", "hosc", "losc"; gpio-controller; interrupt-controller; #interrupt-cells = <3>; diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi index 75a865406d3e..afca4da26167 100644 --- a/arch/arm/boot/dts/sun8i-h3.dtsi +++ b/arch/arm/boot/dts/sun8i-h3.dtsi @@ -321,7 +321,8 @@ reg = <0x01c20800 0x400>; interrupts = , ; - clocks = <&ccu CLK_BUS_PIO>; + clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>; + clock-names = "apb", "hosc", "losc"; gpio-controller; #gpio-cells = <3>; interrupt-controller; diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi index 3c5214cbe4e6..6f8fea2d4808 100644 --- a/arch/arm/boot/dts/sun9i-a80.dtsi +++ b/arch/arm/boot/dts/sun9i-a80.dtsi @@ -678,7 +678,8 @@ , , ; - clocks = <&apb0_gates 5>; + clocks = <&apb0_gates 5>, <&osc24M>, <&osc32k>; + clock-names = "apb", "hosc", "losc"; gpio-controller; interrupt-controller; #interrupt-cells = <3>;