From patchwork Fri Sep 21 04:07:38 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Wang X-Patchwork-Id: 972837 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=mediatek.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 42Gg6s6wNpz9sDP for ; Fri, 21 Sep 2018 14:07:49 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389138AbeIUJyk (ORCPT ); Fri, 21 Sep 2018 05:54:40 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:48966 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S2389061AbeIUJyj (ORCPT ); Fri, 21 Sep 2018 05:54:39 -0400 X-UUID: ed9914fecdbe40c38fe11fda44eeea3a-20180921 Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 346336791; Fri, 21 Sep 2018 12:07:41 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by mtkmbs08n1.mediatek.inc (172.21.101.55) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Fri, 21 Sep 2018 12:07:40 +0800 Received: from mtkswgap22.mediatek.inc (172.21.77.33) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Fri, 21 Sep 2018 12:07:40 +0800 From: To: , CC: , , , Mars Cheng , Sean Wang Subject: [PATCH 4/4] pinctrl: mediatek: add eint support to MT6765 pinctrl driver Date: Fri, 21 Sep 2018 12:07:38 +0800 Message-ID: <82d47055aec8e40422eb72568e96bfbaf199d9d2.1537502494.git.sean.wang@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: MIME-Version: 1.0 X-MTK: N Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Mars Cheng Just add eint support to MT6765 pinctrl driver as usual as happens on the other SoCs. Signed-off-by: Mars Cheng Signed-off-by: Sean Wang --- drivers/pinctrl/mediatek/pinctrl-mt6765.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/pinctrl/mediatek/pinctrl-mt6765.c b/drivers/pinctrl/mediatek/pinctrl-mt6765.c index 1cae634..32451e8 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt6765.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt6765.c @@ -1056,11 +1056,19 @@ static const char * const mt6765_pinctrl_register_base_names[] = { "iocfg6", "iocfg7", }; +static const struct mtk_eint_hw mt6765_eint_hw = { + .port_mask = 7, + .ports = 6, + .ap_num = 160, + .db_cnt = 13, +}; + static const struct mtk_pin_soc mt6765_data = { .reg_cal = mt6765_reg_cals, .pins = mtk_pins_mt6765, .npins = ARRAY_SIZE(mtk_pins_mt6765), .ngrps = ARRAY_SIZE(mtk_pins_mt6765), + .eint_hw = &mt6765_eint_hw, .gpio_m = 0, .ies_present = true, .base_names = mt6765_pinctrl_register_base_names,