Message ID | 7c67d590b13a889466f53edf94192bca3bf6ceec.1692376361.git.christophe.leroy@csgroup.eu |
---|---|
State | New |
Headers | show |
Series | Add support for QMC HDLC, framer infrastruture and PEF2256 framer (v4) | expand |
On Fri, Aug 18, 2023 at 06:39:16PM +0200, Christophe Leroy wrote: > From: Herve Codina <herve.codina@bootlin.com> > > The Lantiq PEF2256 is a framer and line interface component designed to > fulfill all required interfacing between an analog E1/T1/J1 line and the > digital PCM system highway/H.100 bus. > > Signed-off-by: Herve Codina <herve.codina@bootlin.com> > Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> > --- > .../bindings/net/lantiq,pef2256.yaml | 219 ++++++++++++++++++ > 1 file changed, 219 insertions(+) > create mode 100644 Documentation/devicetree/bindings/net/lantiq,pef2256.yaml > > diff --git a/Documentation/devicetree/bindings/net/lantiq,pef2256.yaml b/Documentation/devicetree/bindings/net/lantiq,pef2256.yaml > new file mode 100644 > index 000000000000..72f6777afa3a > --- /dev/null > +++ b/Documentation/devicetree/bindings/net/lantiq,pef2256.yaml > @@ -0,0 +1,219 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/net/lantiq,pef2256.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Lantiq PEF2256 > + > +maintainers: > + - Herve Codina <herve.codina@bootlin.com> > + > +description: > + The Lantiq PEF2256, also known as Infineon PEF2256 or FALC56, is a framer and > + line interface component designed to fulfill all required interfacing between > + an analog E1/T1/J1 line and the digital PCM system highway/H.100 bus. > + > +properties: > + compatible: > + items: > + - const: lantiq,pef2256 > + > + reg: > + maxItems: 1 > + > + clocks: > + items: > + - description: Master clock > + - description: System Clock Receive > + - description: System Clock Transmit > + > + clock-names: > + items: > + - const: mclk > + - const: sclkr > + - const: sclkx > + > + interrupts: > + maxItems: 1 > + > + reset-gpios: > + description: > + GPIO used to reset the device. > + maxItems: 1 > + > + '#framer-cells': Not a standard binding. Do you need provider specific variable number of cells? > + const: 0 > + > + pinctrl: > + $ref: /schemas/pinctrl/pinctrl.yaml# > + additionalProperties: false > + > + patternProperties: > + '-pins$': > + type: object > + $ref: /schemas/pinctrl/pincfg-node.yaml# > + additionalProperties: false > + > + properties: > + pins: > + enum: [ RPA, RPB, RPC, RPD, XPA, XPB, XPC, XPD ] > + > + function: > + enum: [ SYPR, RFM, RFMB, RSIGM, RSIG, DLR, FREEZE, RFSP, LOS, > + SYPX, XFMS, XSIG, TCLK, XMFB, XSIGM, DLX, XCLK, XLT, > + GPI, GPOH, GPOL ] > + > + required: > + - pins > + - function > + > + lantiq,data-rate-bps: > + $ref: /schemas/types.yaml#/definitions/uint32 > + enum: [2048000, 4096000, 8192000, 16384000] > + default: 2048000 > + description: > + Data rate (bit per seconds) on the system highway. > + > + lantiq,clock-falling-edge: > + $ref: /schemas/types.yaml#/definitions/flag > + description: > + Data is sent on falling edge of the clock (and received on the rising > + edge). If 'clock-falling-edge' is not present, data is sent on the > + rising edge (and received on the falling edge). > + > + lantiq,channel-phase: > + $ref: /schemas/types.yaml#/definitions/uint32 > + enum: [0, 1, 2, 3, 4, 5, 6, 7] > + default: 0 > + description: Need '|' to preserve formatting > + The pef2256 delivers a full frame (32 8bit time-slots in E1 and 24 8bit > + time-slots 8 8bit signaling in E1/J1) every 125us. This lead to a data > + rate of 2048000 bit/s. When lantiq,data-rate-bps is more than 2048000 > + bit/s, the data (all 32 8bit) present in the frame are interleave with > + unused time-slots. The lantiq,channel-phase property allows to set the > + correct alignment of the interleave mechanism. > + For instance, suppose lantiq,data-rate-bps = 8192000 (ie 4*2048000), and > + lantiq,channel-phase = 2, the interleave schema with unused time-slots > + (nu) and used time-slots (XX) for TSi is > + nu nu XX nu nu nu XX nu nu nu XX nu > + <-- TSi --> <- TSi+1 -> <- TSi+2 -> > + With lantiq,data-rate-bps = 8192000, and lantiq,channel-phase = 1, the > + interleave schema is > + nu XX nu nu nu XX nu nu nu XX nu nu > + <-- TSi --> <- TSi+1 -> <- TSi+2 -> > + With lantiq,data-rate-bps = 4096000 (ie 2*2048000), and > + lantiq,channel-phase = 1, the interleave schema is > + nu XX nu XX nu XX > + <-- TSi --> <- TSi+1 -> <- TSi+2 -> > + > +patternProperties: > + '^codec(-([0-9]|[1-2][0-9]|3[0-1]))?$': > + type: object > + $ref: /schemas/sound/dai-common.yaml > + unevaluatedProperties: false > + description: > + Codec provided by the pef2256. This codec allows to use some of the PCM > + system highway time-slots as audio channels to transport audio data over > + the E1/T1/J1 lines. > + The time-slots used by the codec must be set and so, the properties > + 'dai-tdm-slot-num', 'dai-tdm-slot-width', 'dai-tdm-slot-tx-mask' and > + 'dai-tdm-slot-rx-mask' must be present in the sound card node for > + sub-nodes that involve the codec. The codec uses 8bit time-slots. > + 'dai-tdm-tdm-slot-with' must be set to 8. > + The tx and rx masks define the pef2256 time-slots assigned to the codec. > + > + properties: > + compatible: > + const: lantiq,pef2256-codec > + > + '#sound-dai-cells': > + const: 0 > + > + required: > + - compatible > + - '#sound-dai-cells' > + > +required: > + - compatible > + - reg > + - clocks > + - clock-names > + - interrupts > + - '#framer-cells' > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/gpio/gpio.h> > + #include <dt-bindings/interrupt-controller/irq.h> > + > + pef2256: framer@2000000 { > + compatible = "lantiq,pef2256"; > + reg = <0x2000000 0x100>; > + interrupts = <8 IRQ_TYPE_LEVEL_LOW>; > + interrupt-parent = <&intc>; > + clocks = <&clk_mclk>, <&clk_sclkr>, <&clk_sclkx>; > + clock-names = "mclk", "sclkr", "sclkx"; > + reset-gpios = <&gpio 11 GPIO_ACTIVE_LOW>; > + lantiq,data-rate-bps = <4096000>; > + #framer-cells = <0>; > + > + pinctrl { > + pef2256_rpa_sypr: rpa-pins { > + pins = "RPA"; > + function = "SYPR"; > + }; > + pef2256_xpa_sypx: xpa-pins { > + pins = "XPA"; > + function = "SYPX"; > + }; > + }; > + > + pef2256_codec0: codec-0 { > + compatible = "lantiq,pef2256-codec"; > + #sound-dai-cells = <0>; > + sound-name-prefix = "PEF2256_0"; > + }; > + > + pef2256_codec1: codec-1 { > + compatible = "lantiq,pef2256-codec"; > + #sound-dai-cells = <0>; > + sound-name-prefix = "PEF2256_1"; > + }; > + }; > + > + sound { > + compatible = "simple-audio-card"; > + #address-cells = <1>; > + #size-cells = <0>; > + simple-audio-card,dai-link@0 { /* CPU DAI1 - pef2256 codec 1 */ > + reg = <0>; > + cpu { > + sound-dai = <&cpu_dai1>; > + }; > + codec { > + sound-dai = <&pef2256_codec0>; > + dai-tdm-slot-num = <4>; > + dai-tdm-slot-width = <8>; > + /* TS 1, 2, 3, 4 */ > + dai-tdm-slot-tx-mask = <0 1 1 1 1>; > + dai-tdm-slot-rx-mask = <0 1 1 1 1>; > + }; > + }; > + simple-audio-card,dai-link@1 { /* CPU DAI2 - pef2256 codec 2 */ > + reg = <1>; > + cpu { > + sound-dai = <&cpu_dai2>; > + }; > + codec { > + sound-dai = <&pef2256_codec1>; > + dai-tdm-slot-num = <4>; > + dai-tdm-slot-width = <8>; > + /* TS 5, 6, 7, 8 */ > + dai-tdm-slot-tx-mask = <0 0 0 0 0 1 1 1 1>; > + dai-tdm-slot-rx-mask = <0 0 0 0 0 1 1 1 1>; > + }; > + }; > + }; > -- > 2.41.0 >
Hi Rob, On Mon, 21 Aug 2023 15:49:29 -0500 Rob Herring <robh@kernel.org> wrote: > On Fri, Aug 18, 2023 at 06:39:16PM +0200, Christophe Leroy wrote: > > From: Herve Codina <herve.codina@bootlin.com> > > > > The Lantiq PEF2256 is a framer and line interface component designed to > > fulfill all required interfacing between an analog E1/T1/J1 line and the > > digital PCM system highway/H.100 bus. > > > > Signed-off-by: Herve Codina <herve.codina@bootlin.com> > > Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> > > --- > > .../bindings/net/lantiq,pef2256.yaml | 219 ++++++++++++++++++ > > 1 file changed, 219 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/net/lantiq,pef2256.yaml ... > > + '#framer-cells': > > Not a standard binding. Do you need provider specific variable number of > cells? For the PEF2256, I don't need it. It will be removed in the next iteration. > > > + const: 0 > > + ... > > + lantiq,channel-phase: > > + $ref: /schemas/types.yaml#/definitions/uint32 > > + enum: [0, 1, 2, 3, 4, 5, 6, 7] > > + default: 0 > > + description: > > Need '|' to preserve formatting Will be fixed in the next iteration. Best regards, Hervé
diff --git a/Documentation/devicetree/bindings/net/lantiq,pef2256.yaml b/Documentation/devicetree/bindings/net/lantiq,pef2256.yaml new file mode 100644 index 000000000000..72f6777afa3a --- /dev/null +++ b/Documentation/devicetree/bindings/net/lantiq,pef2256.yaml @@ -0,0 +1,219 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/lantiq,pef2256.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Lantiq PEF2256 + +maintainers: + - Herve Codina <herve.codina@bootlin.com> + +description: + The Lantiq PEF2256, also known as Infineon PEF2256 or FALC56, is a framer and + line interface component designed to fulfill all required interfacing between + an analog E1/T1/J1 line and the digital PCM system highway/H.100 bus. + +properties: + compatible: + items: + - const: lantiq,pef2256 + + reg: + maxItems: 1 + + clocks: + items: + - description: Master clock + - description: System Clock Receive + - description: System Clock Transmit + + clock-names: + items: + - const: mclk + - const: sclkr + - const: sclkx + + interrupts: + maxItems: 1 + + reset-gpios: + description: + GPIO used to reset the device. + maxItems: 1 + + '#framer-cells': + const: 0 + + pinctrl: + $ref: /schemas/pinctrl/pinctrl.yaml# + additionalProperties: false + + patternProperties: + '-pins$': + type: object + $ref: /schemas/pinctrl/pincfg-node.yaml# + additionalProperties: false + + properties: + pins: + enum: [ RPA, RPB, RPC, RPD, XPA, XPB, XPC, XPD ] + + function: + enum: [ SYPR, RFM, RFMB, RSIGM, RSIG, DLR, FREEZE, RFSP, LOS, + SYPX, XFMS, XSIG, TCLK, XMFB, XSIGM, DLX, XCLK, XLT, + GPI, GPOH, GPOL ] + + required: + - pins + - function + + lantiq,data-rate-bps: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [2048000, 4096000, 8192000, 16384000] + default: 2048000 + description: + Data rate (bit per seconds) on the system highway. + + lantiq,clock-falling-edge: + $ref: /schemas/types.yaml#/definitions/flag + description: + Data is sent on falling edge of the clock (and received on the rising + edge). If 'clock-falling-edge' is not present, data is sent on the + rising edge (and received on the falling edge). + + lantiq,channel-phase: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2, 3, 4, 5, 6, 7] + default: 0 + description: + The pef2256 delivers a full frame (32 8bit time-slots in E1 and 24 8bit + time-slots 8 8bit signaling in E1/J1) every 125us. This lead to a data + rate of 2048000 bit/s. When lantiq,data-rate-bps is more than 2048000 + bit/s, the data (all 32 8bit) present in the frame are interleave with + unused time-slots. The lantiq,channel-phase property allows to set the + correct alignment of the interleave mechanism. + For instance, suppose lantiq,data-rate-bps = 8192000 (ie 4*2048000), and + lantiq,channel-phase = 2, the interleave schema with unused time-slots + (nu) and used time-slots (XX) for TSi is + nu nu XX nu nu nu XX nu nu nu XX nu + <-- TSi --> <- TSi+1 -> <- TSi+2 -> + With lantiq,data-rate-bps = 8192000, and lantiq,channel-phase = 1, the + interleave schema is + nu XX nu nu nu XX nu nu nu XX nu nu + <-- TSi --> <- TSi+1 -> <- TSi+2 -> + With lantiq,data-rate-bps = 4096000 (ie 2*2048000), and + lantiq,channel-phase = 1, the interleave schema is + nu XX nu XX nu XX + <-- TSi --> <- TSi+1 -> <- TSi+2 -> + +patternProperties: + '^codec(-([0-9]|[1-2][0-9]|3[0-1]))?$': + type: object + $ref: /schemas/sound/dai-common.yaml + unevaluatedProperties: false + description: + Codec provided by the pef2256. This codec allows to use some of the PCM + system highway time-slots as audio channels to transport audio data over + the E1/T1/J1 lines. + The time-slots used by the codec must be set and so, the properties + 'dai-tdm-slot-num', 'dai-tdm-slot-width', 'dai-tdm-slot-tx-mask' and + 'dai-tdm-slot-rx-mask' must be present in the sound card node for + sub-nodes that involve the codec. The codec uses 8bit time-slots. + 'dai-tdm-tdm-slot-with' must be set to 8. + The tx and rx masks define the pef2256 time-slots assigned to the codec. + + properties: + compatible: + const: lantiq,pef2256-codec + + '#sound-dai-cells': + const: 0 + + required: + - compatible + - '#sound-dai-cells' + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + - '#framer-cells' + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/irq.h> + + pef2256: framer@2000000 { + compatible = "lantiq,pef2256"; + reg = <0x2000000 0x100>; + interrupts = <8 IRQ_TYPE_LEVEL_LOW>; + interrupt-parent = <&intc>; + clocks = <&clk_mclk>, <&clk_sclkr>, <&clk_sclkx>; + clock-names = "mclk", "sclkr", "sclkx"; + reset-gpios = <&gpio 11 GPIO_ACTIVE_LOW>; + lantiq,data-rate-bps = <4096000>; + #framer-cells = <0>; + + pinctrl { + pef2256_rpa_sypr: rpa-pins { + pins = "RPA"; + function = "SYPR"; + }; + pef2256_xpa_sypx: xpa-pins { + pins = "XPA"; + function = "SYPX"; + }; + }; + + pef2256_codec0: codec-0 { + compatible = "lantiq,pef2256-codec"; + #sound-dai-cells = <0>; + sound-name-prefix = "PEF2256_0"; + }; + + pef2256_codec1: codec-1 { + compatible = "lantiq,pef2256-codec"; + #sound-dai-cells = <0>; + sound-name-prefix = "PEF2256_1"; + }; + }; + + sound { + compatible = "simple-audio-card"; + #address-cells = <1>; + #size-cells = <0>; + simple-audio-card,dai-link@0 { /* CPU DAI1 - pef2256 codec 1 */ + reg = <0>; + cpu { + sound-dai = <&cpu_dai1>; + }; + codec { + sound-dai = <&pef2256_codec0>; + dai-tdm-slot-num = <4>; + dai-tdm-slot-width = <8>; + /* TS 1, 2, 3, 4 */ + dai-tdm-slot-tx-mask = <0 1 1 1 1>; + dai-tdm-slot-rx-mask = <0 1 1 1 1>; + }; + }; + simple-audio-card,dai-link@1 { /* CPU DAI2 - pef2256 codec 2 */ + reg = <1>; + cpu { + sound-dai = <&cpu_dai2>; + }; + codec { + sound-dai = <&pef2256_codec1>; + dai-tdm-slot-num = <4>; + dai-tdm-slot-width = <8>; + /* TS 5, 6, 7, 8 */ + dai-tdm-slot-tx-mask = <0 0 0 0 0 1 1 1 1>; + dai-tdm-slot-rx-mask = <0 0 0 0 0 1 1 1 1>; + }; + }; + };