From patchwork Fri Oct 18 13:19:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lorenzo Bianconi X-Patchwork-Id: 1999120 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=QyPlWPx1; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2604:1380:45e3:2400::1; helo=sv.mirrors.kernel.org; envelope-from=linux-gpio+bounces-11629-incoming=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org [IPv6:2604:1380:45e3:2400::1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4XVQKV3DPkz1xwG for ; Sat, 19 Oct 2024 00:19:42 +1100 (AEDT) Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id 2A799282DCB for ; Fri, 18 Oct 2024 13:19:41 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id ED2471D47CD; Fri, 18 Oct 2024 13:19:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="QyPlWPx1" X-Original-To: linux-gpio@vger.kernel.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 97BDD1E49F; Fri, 18 Oct 2024 13:19:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729257575; cv=none; b=Qy7jbNwvTs4RlrynUya6b60gtV7+80M5Pb+ozwsAa5nLcjMiQ4NXYms/LgstnvGMQ4xp/y+mXHeAKUYSay55hyhLMfybJr1hU+QsstYl+MyuCY8VkGIDwbae0l679kTPuut6dE5FObGze9WxPmOZ1p24rJ9pbpLyAQZeRZhGaoM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729257575; c=relaxed/simple; bh=PHnsXDPgonSGur7LNFvBXgYxGpnNy03h+D9rXnrfuM4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=JDWbpIVQdC4Si6Yq0Z32g3sVqEDL8wL0Y1qGZytAu+mPkezcps/WdmGG/shq5DFds1cLAxeOEN7i8Zu6dQQjCJIPzoXKniYMb5F6Ulv7sLYVSHJNiau5lVF1oKmLgboQSHPGMIInw/kMQK6ruJbiLJ4f7qGTwX6GIklXPFHNU04= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=QyPlWPx1; arc=none smtp.client-ip=10.30.226.201 Received: by smtp.kernel.org (Postfix) with ESMTPSA id A9DD4C4CEC3; Fri, 18 Oct 2024 13:19:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1729257575; bh=PHnsXDPgonSGur7LNFvBXgYxGpnNy03h+D9rXnrfuM4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=QyPlWPx1ufr/SOFonrtE0x1Vc4ChBXk3dtre3iuZiOk6vV3RrEWyNvU68G8+Ab6NO wbujSjo8Y/GcVpPtg0CVZQgmxTYr5Y9VxXRtVBUJfuuPisVFJO7GEEAVMPfMtwTB+H /JJrq+BCaYvzCKlahrmwBpR+LEPQax9YTghbosJkCtgHEehOo2ya54HTvXNMJADeQF 6XyDAVzWgucfDRFvZMc29ZsBTyZ8EqtDX4ADr6I/Q/AFXdGoobaTod2mcBXgfZHy4z 9BXHXBPGZtbtfH/TR8hlVQubrnFXUGMdfn5FJDmKGRalxRQrYcYjgfjW3y0Ta72It3 5TuCSizi5v5uQ== From: Lorenzo Bianconi Date: Fri, 18 Oct 2024 15:19:02 +0200 Subject: [PATCH v8 1/6] dt-bindings: arm: airoha: Add the chip-scu node for EN7581 SoC Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241018-en7581-pinctrl-v8-1-b676b966a1d1@kernel.org> References: <20241018-en7581-pinctrl-v8-0-b676b966a1d1@kernel.org> In-Reply-To: <20241018-en7581-pinctrl-v8-0-b676b966a1d1@kernel.org> To: Lorenzo Bianconi , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sean Wang , Matthias Brugger , AngeloGioacchino Del Regno , Lee Jones , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= Cc: linux-mediatek@lists.infradead.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, upstream@airoha.com, benjamin.larsson@genexis.eu, ansuelsmth@gmail.com, linux-pwm@vger.kernel.org X-Mailer: b4 0.14.2 This patch adds the chip-scu document bindings for EN7581 SoC. The airoha chip-scu block provides a configuration interface for clock, io-muxing and other functionalities used by multiple controllers (e.g. clock, pinctrl, ecc.) on EN7581 SoC. Reviewed-by: Rob Herring (Arm) Signed-off-by: Lorenzo Bianconi --- .../bindings/arm/airoha,en7581-chip-scu.yaml | 42 ++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/airoha,en7581-chip-scu.yaml b/Documentation/devicetree/bindings/arm/airoha,en7581-chip-scu.yaml new file mode 100644 index 0000000000000000000000000000000000000000..67c449d804c22b6b8268c9840995fe2584349b58 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/airoha,en7581-chip-scu.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/airoha,en7581-chip-scu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Airoha Chip SCU Controller for EN7581 SoC + +maintainers: + - Lorenzo Bianconi + +description: + The airoha chip-scu block provides a configuration interface for clock, + io-muxing and other functionalities used by multiple controllers (e.g. clock, + pinctrl, ecc) on EN7581 SoC. + +properties: + compatible: + items: + - enum: + - airoha,en7581-chip-scu + - const: syscon + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + soc { + #address-cells = <2>; + #size-cells = <2>; + syscon@1fa20000 { + compatible = "airoha,en7581-chip-scu", "syscon"; + reg = <0x0 0x1fa20000 0x0 0x388>; + }; + };