| Message ID | 20240913074325.239390-2-billy_tsai@aspeedtech.com |
|---|---|
| State | New |
| Headers | show |
| Series | Add Aspeed G7 gpio support | expand |
On Fri, Sep 13, 2024 at 03:43:20PM +0800, Billy Tsai wrote: > The AST2700 is the 7th generation SoC from Aspeed, featuring two GPIO > controllers: one with 12 GPIO pins and another with 216 GPIO pins. > > Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com> Acked-by: Conor Dooley <conor.dooley@microchip.com>
diff --git a/Documentation/devicetree/bindings/gpio/aspeed,ast2400-gpio.yaml b/Documentation/devicetree/bindings/gpio/aspeed,ast2400-gpio.yaml index cf11aa7ec8c7..b9afd07a9d24 100644 --- a/Documentation/devicetree/bindings/gpio/aspeed,ast2400-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/aspeed,ast2400-gpio.yaml @@ -15,6 +15,7 @@ properties: - aspeed,ast2400-gpio - aspeed,ast2500-gpio - aspeed,ast2600-gpio + - aspeed,ast2700-gpio reg: maxItems: 1 @@ -25,7 +26,7 @@ properties: gpio-controller: true gpio-line-names: - minItems: 36 + minItems: 12 maxItems: 232 gpio-ranges: true @@ -42,7 +43,7 @@ properties: const: 2 ngpios: - minimum: 36 + minimum: 12 maximum: 232 required: @@ -93,6 +94,20 @@ allOf: enum: [ 36, 208 ] required: - ngpios + - if: + properties: + compatible: + contains: + const: aspeed,ast2700-gpio + then: + properties: + gpio-line-names: + minItems: 12 + maxItems: 216 + ngpios: + enum: [ 12, 216 ] + required: + - ngpios additionalProperties: false
The AST2700 is the 7th generation SoC from Aspeed, featuring two GPIO controllers: one with 12 GPIO pins and another with 216 GPIO pins. Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com> --- .../bindings/gpio/aspeed,ast2400-gpio.yaml | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-)