| Message ID | 20240703035735.2182165-20-quic_tengfan@quicinc.com |
|---|---|
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Subject: [PATCH 19/47] dt-bindings: cache: qcom,llcc: Add QCS9100 description
Date: Wed, 3 Jul 2024 11:57:07 +0800
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| Series |
[01/47] dt-bindings: arm: qcom: Document QCS9100 SoC and RIDE board
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expand
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diff --git a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml index 68ea5f70b75f..a38c8b99099e 100644 --- a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml +++ b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml @@ -21,6 +21,7 @@ properties: compatible: enum: - qcom,qdu1000-llcc + - qcom,qcs9100-llcc - qcom,sa8775p-llcc - qcom,sc7180-llcc - qcom,sc7280-llcc @@ -85,6 +86,7 @@ allOf: compatible: contains: enum: + - qcom,qcs9100-llcc - qcom,sa8775p-llcc then: properties:
Add the cache controller compatible and register region descriptions for QCS9100 platform. Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> --- Documentation/devicetree/bindings/cache/qcom,llcc.yaml | 2 ++ 1 file changed, 2 insertions(+)