Message ID | 20230731095026.3766675-4-sai.krishna.potthuri@amd.com |
---|---|
State | New |
Headers | show
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Mon, 31 Jul 2023 04:50:46 -0500 Received: from SATLEXMB03.amd.com (10.181.40.144) by SATLEXMB05.amd.com (10.181.40.146) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Mon, 31 Jul 2023 04:50:46 -0500 Received: from xhdlakshmis40.xilinx.com (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server id 15.1.2507.27 via Frontend Transport; Mon, 31 Jul 2023 04:50:42 -0500 From: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com> To: Linus Walleij <linus.walleij@linaro.org>, Michal Simek <michal.simek@amd.com>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Mathieu Poirier <mathieu.poirier@linaro.org>, Tanmay Shah <tanmay.shah@amd.com>, Ben Levinsky <ben.levinsky@amd.com>, Marek Vasut <marex@denx.de>, Roman Gushchin <roman.gushchin@linux.dev>, Arnd Bergmann <arnd@arndb.de> CC: <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <linux-gpio@vger.kernel.org>, <devicetree@vger.kernel.org>, <saikrishna12468@gmail.com>, <git@amd.com>, Sai Krishna Potthuri <sai.krishna.potthuri@amd.com> Subject: [PATCH v3 3/4] dt-bindings: pinctrl-zynqmp: Add output-enable configuration Date: Mon, 31 Jul 2023 15:20:25 +0530 Message-ID: <20230731095026.3766675-4-sai.krishna.potthuri@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230731095026.3766675-1-sai.krishna.potthuri@amd.com> References: <20230731095026.3766675-1-sai.krishna.potthuri@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT064:EE_|SN7PR12MB7203:EE_ X-MS-Office365-Filtering-Correlation-Id: 2eaccb49-806a-418b-a26b-08db91ab9e05 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Series |
pinctrl: pinctrl-zynqmp: Add tri-state configuration support
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expand
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diff --git a/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml index 2722dc7bb03d..1e2b9b627b12 100644 --- a/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml @@ -274,6 +274,10 @@ patternProperties: slew-rate: enum: [0, 1] + output-enable: + description: + This will internally disable the tri-state for MIO pins. + drive-strength: description: Selects the drive strength for MIO pins, in mA.