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[88.156.142.199]) by smtp.gmail.com with ESMTPSA id be13-20020a056512250d00b004a8b9c68735sm1890611lfb.102.2022.11.08.10.45.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Nov 2022 10:45:33 -0800 (PST) From: Krzysztof Kozlowski To: Bjorn Andersson , Andy Gross , Konrad Dybcio , Linus Walleij , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 2/3] ARM: dts: qcom-msm8960: use define for interrupt constants Date: Tue, 8 Nov 2022 19:45:28 +0100 Message-Id: <20221108184529.26857-2-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221108184529.26857-1-krzysztof.kozlowski@linaro.org> References: <20221108184529.26857-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Replace GIC_PPI, GIC_SPI and interrupt type numbers with appropriate defines. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio --- arch/arm/boot/dts/qcom-msm8960-cdp.dts | 2 +- arch/arm/boot/dts/qcom-msm8960.dtsi | 22 ++++++++++++---------- 2 files changed, 13 insertions(+), 11 deletions(-) diff --git a/arch/arm/boot/dts/qcom-msm8960-cdp.dts b/arch/arm/boot/dts/qcom-msm8960-cdp.dts index cb0f612e6c90..3a484ac53917 100644 --- a/arch/arm/boot/dts/qcom-msm8960-cdp.dts +++ b/arch/arm/boot/dts/qcom-msm8960-cdp.dts @@ -42,7 +42,7 @@ ethernet@0 { compatible = "micrel,ks8851"; reg = <0>; interrupt-parent = <&msmgpio>; - interrupts = <90 8>; + interrupts = <90 IRQ_TYPE_LEVEL_LOW>; spi-max-frequency = <5400000>; vdd-supply = <&ext_l2>; vdd-io-supply = <&pm8921_lvs6>; diff --git a/arch/arm/boot/dts/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom-msm8960.dtsi index 30abf53b062d..2f32e734f18d 100644 --- a/arch/arm/boot/dts/qcom-msm8960.dtsi +++ b/arch/arm/boot/dts/qcom-msm8960.dtsi @@ -17,7 +17,7 @@ / { cpus { #address-cells = <1>; #size-cells = <0>; - interrupts = <1 14 0x304>; + interrupts = ; cpu@0 { compatible = "qcom,krait"; @@ -52,7 +52,7 @@ memory { cpu-pmu { compatible = "qcom,krait-pmu"; - interrupts = <1 10 0x304>; + interrupts = ; qcom,no-pc-write; }; @@ -105,9 +105,9 @@ intc: interrupt-controller@2000000 { timer@200a000 { compatible = "qcom,kpss-timer", "qcom,kpss-wdt-msm8960", "qcom,msm-timer"; - interrupts = <1 1 0x301>, - <1 2 0x301>, - <1 3 0x301>; + interrupts = , + , + ; reg = <0x0200a000 0x100>; clock-frequency = <27000000>, <32768>; @@ -119,7 +119,7 @@ msmgpio: pinctrl@800000 { gpio-controller; gpio-ranges = <&msmgpio 0 0 152>; #gpio-cells = <2>; - interrupts = <0 16 0x4>; + interrupts = ; interrupt-controller; #interrupt-cells = <2>; reg = <0x800000 0x4000>; @@ -255,7 +255,7 @@ ssbi@500000 { pmicintc: pmic { compatible = "qcom,pm8921"; interrupt-parent = <&msmgpio>; - interrupts = <104 8>; + interrupts = <104 IRQ_TYPE_LEVEL_LOW>; #interrupt-cells = <2>; interrupt-controller; #address-cells = <1>; @@ -265,7 +265,8 @@ pwrkey@1c { compatible = "qcom,pm8921-pwrkey"; reg = <0x1c>; interrupt-parent = <&pmicintc>; - interrupts = <50 1>, <51 1>; + interrupts = <50 IRQ_TYPE_EDGE_RISING>, + <51 IRQ_TYPE_EDGE_RISING>; debounce = <15625>; pull-up; }; @@ -274,7 +275,8 @@ keypad@148 { compatible = "qcom,pm8921-keypad"; reg = <0x148>; interrupt-parent = <&pmicintc>; - interrupts = <74 1>, <75 1>; + interrupts = <74 IRQ_TYPE_EDGE_RISING>, + <75 IRQ_TYPE_EDGE_RISING>; debounce = <15>; scan-delay = <32>; row-hold = <91500>; @@ -283,7 +285,7 @@ keypad@148 { rtc@11d { compatible = "qcom,pm8921-rtc"; interrupt-parent = <&pmicintc>; - interrupts = <39 1>; + interrupts = <39 IRQ_TYPE_EDGE_RISING>; reg = <0x11d>; allow-set-time; };