From patchwork Wed Sep 26 14:50:29 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 975194 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.intel.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 42L18V6gnYz9s8F for ; Thu, 27 Sep 2018 00:50:50 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726994AbeIZVEI (ORCPT ); Wed, 26 Sep 2018 17:04:08 -0400 Received: from mga14.intel.com ([192.55.52.115]:64932 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726937AbeIZVEH (ORCPT ); Wed, 26 Sep 2018 17:04:07 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Sep 2018 07:50:33 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,306,1534834800"; d="scan'208";a="94987875" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga002.jf.intel.com with ESMTP; 26 Sep 2018 07:50:31 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id A7F313B2; Wed, 26 Sep 2018 17:50:30 +0300 (EEST) From: Andy Shevchenko To: Linus Walleij , linux-gpio@vger.kernel.org, Mika Westerberg Cc: Andy Shevchenko Subject: [PATCH v1 4/4] pinctrl: broxton: Convert unsigned to unsigned int Date: Wed, 26 Sep 2018 17:50:29 +0300 Message-Id: <20180926145029.53399-4-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.19.0 In-Reply-To: <20180926145029.53399-1-andriy.shevchenko@linux.intel.com> References: <20180926145029.53399-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Simple type conversion with no functional change implied. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/intel/pinctrl-broxton.c | 106 ++++++++++++------------ 1 file changed, 53 insertions(+), 53 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-broxton.c b/drivers/pinctrl/intel/pinctrl-broxton.c index 452b59283253..68fefd4618bd 100644 --- a/drivers/pinctrl/intel/pinctrl-broxton.c +++ b/drivers/pinctrl/intel/pinctrl-broxton.c @@ -117,17 +117,17 @@ static const struct pinctrl_pin_desc bxt_north_pins[] = { PINCTRL_PIN(82, "TDO"), }; -static const unsigned bxt_north_pwm0_pins[] = { 34 }; -static const unsigned bxt_north_pwm1_pins[] = { 35 }; -static const unsigned bxt_north_pwm2_pins[] = { 36 }; -static const unsigned bxt_north_pwm3_pins[] = { 37 }; -static const unsigned bxt_north_uart0_pins[] = { 38, 39, 40, 41 }; -static const unsigned bxt_north_uart1_pins[] = { 42, 43, 44, 45 }; -static const unsigned bxt_north_uart2_pins[] = { 46, 47, 48, 49 }; -static const unsigned bxt_north_uart0b_pins[] = { 50, 51, 52, 53 }; -static const unsigned bxt_north_uart1b_pins[] = { 54, 55, 56, 57 }; -static const unsigned bxt_north_uart2b_pins[] = { 58, 59, 60, 61 }; -static const unsigned bxt_north_uart3_pins[] = { 58, 59, 60, 61 }; +static const unsigned int bxt_north_pwm0_pins[] = { 34 }; +static const unsigned int bxt_north_pwm1_pins[] = { 35 }; +static const unsigned int bxt_north_pwm2_pins[] = { 36 }; +static const unsigned int bxt_north_pwm3_pins[] = { 37 }; +static const unsigned int bxt_north_uart0_pins[] = { 38, 39, 40, 41 }; +static const unsigned int bxt_north_uart1_pins[] = { 42, 43, 44, 45 }; +static const unsigned int bxt_north_uart2_pins[] = { 46, 47, 48, 49 }; +static const unsigned int bxt_north_uart0b_pins[] = { 50, 51, 52, 53 }; +static const unsigned int bxt_north_uart1b_pins[] = { 54, 55, 56, 57 }; +static const unsigned int bxt_north_uart2b_pins[] = { 58, 59, 60, 61 }; +static const unsigned int bxt_north_uart3_pins[] = { 58, 59, 60, 61 }; static const struct intel_pingroup bxt_north_groups[] = { PIN_GROUP("pwm0_grp", bxt_north_pwm0_pins, 1), @@ -260,12 +260,12 @@ static const struct pinctrl_pin_desc bxt_northwest_pins[] = { PINCTRL_PIN(71, "GP_SSP_2_TXD"), }; -static const unsigned bxt_northwest_ssp0_pins[] = { 53, 54, 55, 56, 57, 58 }; -static const unsigned bxt_northwest_ssp1_pins[] = { +static const unsigned int bxt_northwest_ssp0_pins[] = { 53, 54, 55, 56, 57, 58 }; +static const unsigned int bxt_northwest_ssp1_pins[] = { 59, 60, 61, 62, 63, 64, 65 }; -static const unsigned bxt_northwest_ssp2_pins[] = { 66, 67, 68, 69, 70, 71 }; -static const unsigned bxt_northwest_uart3_pins[] = { 67, 68, 69, 70 }; +static const unsigned int bxt_northwest_ssp2_pins[] = { 66, 67, 68, 69, 70, 71 }; +static const unsigned int bxt_northwest_uart3_pins[] = { 67, 68, 69, 70 }; static const struct intel_pingroup bxt_northwest_groups[] = { PIN_GROUP("ssp0_grp", bxt_northwest_ssp0_pins, 1), @@ -347,17 +347,17 @@ static const struct pinctrl_pin_desc bxt_west_pins[] = { PINCTRL_PIN(41, "OSC_CLK_OUT_3"), }; -static const unsigned bxt_west_i2c0_pins[] = { 0, 1 }; -static const unsigned bxt_west_i2c1_pins[] = { 2, 3 }; -static const unsigned bxt_west_i2c2_pins[] = { 4, 5 }; -static const unsigned bxt_west_i2c3_pins[] = { 6, 7 }; -static const unsigned bxt_west_i2c4_pins[] = { 8, 9 }; -static const unsigned bxt_west_i2c5_pins[] = { 10, 11 }; -static const unsigned bxt_west_i2c6_pins[] = { 12, 13 }; -static const unsigned bxt_west_i2c7_pins[] = { 14, 15 }; -static const unsigned bxt_west_i2c5b_pins[] = { 16, 17 }; -static const unsigned bxt_west_i2c6b_pins[] = { 18, 19 }; -static const unsigned bxt_west_i2c7b_pins[] = { 20, 21 }; +static const unsigned int bxt_west_i2c0_pins[] = { 0, 1 }; +static const unsigned int bxt_west_i2c1_pins[] = { 2, 3 }; +static const unsigned int bxt_west_i2c2_pins[] = { 4, 5 }; +static const unsigned int bxt_west_i2c3_pins[] = { 6, 7 }; +static const unsigned int bxt_west_i2c4_pins[] = { 8, 9 }; +static const unsigned int bxt_west_i2c5_pins[] = { 10, 11 }; +static const unsigned int bxt_west_i2c6_pins[] = { 12, 13 }; +static const unsigned int bxt_west_i2c7_pins[] = { 14, 15 }; +static const unsigned int bxt_west_i2c5b_pins[] = { 16, 17 }; +static const unsigned int bxt_west_i2c6b_pins[] = { 18, 19 }; +static const unsigned int bxt_west_i2c7b_pins[] = { 20, 21 }; static const struct intel_pingroup bxt_west_groups[] = { PIN_GROUP("i2c0_grp", bxt_west_i2c0_pins, 1), @@ -443,13 +443,13 @@ static const struct pinctrl_pin_desc bxt_southwest_pins[] = { PINCTRL_PIN(30, "SDCARD_LVL_WP"), }; -static const unsigned bxt_southwest_emmc0_pins[] = { +static const unsigned int bxt_southwest_emmc0_pins[] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 26, }; -static const unsigned bxt_southwest_sdio_pins[] = { +static const unsigned int bxt_southwest_sdio_pins[] = { 10, 11, 12, 13, 14, 15, 27, }; -static const unsigned bxt_southwest_sdcard_pins[] = { +static const unsigned int bxt_southwest_sdcard_pins[] = { 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 28, 29, 30, }; @@ -611,13 +611,13 @@ static const struct pinctrl_pin_desc apl_north_pins[] = { PINCTRL_PIN(77, "SVID0_CLK"), }; -static const unsigned apl_north_pwm0_pins[] = { 34 }; -static const unsigned apl_north_pwm1_pins[] = { 35 }; -static const unsigned apl_north_pwm2_pins[] = { 36 }; -static const unsigned apl_north_pwm3_pins[] = { 37 }; -static const unsigned apl_north_uart0_pins[] = { 38, 39, 40, 41 }; -static const unsigned apl_north_uart1_pins[] = { 42, 43, 44, 45 }; -static const unsigned apl_north_uart2_pins[] = { 46, 47, 48, 49 }; +static const unsigned int apl_north_pwm0_pins[] = { 34 }; +static const unsigned int apl_north_pwm1_pins[] = { 35 }; +static const unsigned int apl_north_pwm2_pins[] = { 36 }; +static const unsigned int apl_north_pwm3_pins[] = { 37 }; +static const unsigned int apl_north_uart0_pins[] = { 38, 39, 40, 41 }; +static const unsigned int apl_north_uart1_pins[] = { 42, 43, 44, 45 }; +static const unsigned int apl_north_uart2_pins[] = { 46, 47, 48, 49 }; static const struct intel_pingroup apl_north_groups[] = { PIN_GROUP("pwm0_grp", apl_north_pwm0_pins, 1), @@ -743,10 +743,10 @@ static const struct pinctrl_pin_desc apl_northwest_pins[] = { PINCTRL_PIN(76, "GP_SSP_2_TXD"), }; -static const unsigned apl_northwest_ssp0_pins[] = { 61, 62, 63, 64, 65 }; -static const unsigned apl_northwest_ssp1_pins[] = { 66, 67, 68, 69, 70 }; -static const unsigned apl_northwest_ssp2_pins[] = { 71, 72, 73, 74, 75, 76 }; -static const unsigned apl_northwest_uart3_pins[] = { 67, 68, 69, 70 }; +static const unsigned int apl_northwest_ssp0_pins[] = { 61, 62, 63, 64, 65 }; +static const unsigned int apl_northwest_ssp1_pins[] = { 66, 67, 68, 69, 70 }; +static const unsigned int apl_northwest_ssp2_pins[] = { 71, 72, 73, 74, 75, 76 }; +static const unsigned int apl_northwest_uart3_pins[] = { 67, 68, 69, 70 }; static const struct intel_pingroup apl_northwest_groups[] = { PIN_GROUP("ssp0_grp", apl_northwest_ssp0_pins, 1), @@ -833,15 +833,15 @@ static const struct pinctrl_pin_desc apl_west_pins[] = { PINCTRL_PIN(46, "SUSPWRDNACK"), }; -static const unsigned apl_west_i2c0_pins[] = { 0, 1 }; -static const unsigned apl_west_i2c1_pins[] = { 2, 3 }; -static const unsigned apl_west_i2c2_pins[] = { 4, 5 }; -static const unsigned apl_west_i2c3_pins[] = { 6, 7 }; -static const unsigned apl_west_i2c4_pins[] = { 8, 9 }; -static const unsigned apl_west_i2c5_pins[] = { 10, 11 }; -static const unsigned apl_west_i2c6_pins[] = { 12, 13 }; -static const unsigned apl_west_i2c7_pins[] = { 14, 15 }; -static const unsigned apl_west_uart2_pins[] = { 20, 21, 22, 34 }; +static const unsigned int apl_west_i2c0_pins[] = { 0, 1 }; +static const unsigned int apl_west_i2c1_pins[] = { 2, 3 }; +static const unsigned int apl_west_i2c2_pins[] = { 4, 5 }; +static const unsigned int apl_west_i2c3_pins[] = { 6, 7 }; +static const unsigned int apl_west_i2c4_pins[] = { 8, 9 }; +static const unsigned int apl_west_i2c5_pins[] = { 10, 11 }; +static const unsigned int apl_west_i2c6_pins[] = { 12, 13 }; +static const unsigned int apl_west_i2c7_pins[] = { 14, 15 }; +static const unsigned int apl_west_uart2_pins[] = { 20, 21, 22, 34 }; static const struct intel_pingroup apl_west_groups[] = { PIN_GROUP("i2c0_grp", apl_west_i2c0_pins, 1), @@ -939,16 +939,16 @@ static const struct pinctrl_pin_desc apl_southwest_pins[] = { PINCTRL_PIN(42, "LPC_FRAMEB"), }; -static const unsigned apl_southwest_emmc0_pins[] = { +static const unsigned int apl_southwest_emmc0_pins[] = { 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 29, }; -static const unsigned apl_southwest_sdio_pins[] = { +static const unsigned int apl_southwest_sdio_pins[] = { 14, 15, 16, 17, 18, 19, 30, }; -static const unsigned apl_southwest_sdcard_pins[] = { +static const unsigned int apl_southwest_sdcard_pins[] = { 20, 21, 22, 23, 24, 25, 26, 27, 28, }; -static const unsigned apl_southwest_i2c7_pins[] = { 32, 33 }; +static const unsigned int apl_southwest_i2c7_pins[] = { 32, 33 }; static const struct intel_pingroup apl_southwest_groups[] = { PIN_GROUP("emmc0_grp", apl_southwest_emmc0_pins, 1),