From patchwork Fri Mar 23 16:34:50 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Boyd X-Patchwork-Id: 890055 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=chromium.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="d9GjtxAW"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 4078Lm33n3z9s0w for ; Sat, 24 Mar 2018 03:36:32 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752394AbeCWQga (ORCPT ); Fri, 23 Mar 2018 12:36:30 -0400 Received: from mail-pg0-f68.google.com ([74.125.83.68]:38049 "EHLO mail-pg0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751806AbeCWQe6 (ORCPT ); Fri, 23 Mar 2018 12:34:58 -0400 Received: by mail-pg0-f68.google.com with SMTP id a15so4775007pgn.5 for ; Fri, 23 Mar 2018 09:34:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=FGqHvdtEXH6ISReSBpU2jC6lg7R0YUgxQtmnA6KZ8S4=; b=d9GjtxAWH2zckAHynuVgiDkZEqEVCoswJyDpNPao/Pgz84fDzPX5kGdI9hWy4l7DvH hNsWLgTmcvNp4zMHALicfuE8YGzglOqyJaqVYxtvDXD5LVYwIWGaXBErKxccegsiGq+i p58rs8jWwqH5izOZuSx7r1K5HXaOAEKHbOys8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=FGqHvdtEXH6ISReSBpU2jC6lg7R0YUgxQtmnA6KZ8S4=; b=fMZ+JnNZmUug8+aHc97P0RghXIL+ErwT1rOsu73IIiReoblcb2jBfrFE22mKbwXqwA 4iHCymUNBXw1kfIc+qvD8GwfihTUjg2lhjdkbApoM68OY7it+zM3Ss8Iw0cTyg+Yc6Rj xZA2MG85NuMuhX7YXQtDVbDVnt2OsIi1gpETpbQ8LwIMDp2Y7uNOIhFiY9Z2gRYQhVNh 5qGjiSgsXSA1lOS2CVAuw3q3K5o22x4hh90fyveHOFDF7BPBca2XJ2r8sCHKMHL+8akI LsGjgdMZWBeG3s6A1tYo4ty7woUp2Tt/W8WeZz7w2T+0kQoyUK2T6CqGhyIWrNr97ALg +S0A== X-Gm-Message-State: AElRT7GcDQjfuFm4FGC/zZ244cfpjGOHjs2Tn63FLpT014emC1VXUL24 WE5Tznq/cWEkhoh0Cp2BeaS71w== X-Google-Smtp-Source: AG47ELskd6GPdfVEai96i1NCFmZKy0XqNCO1P8XlWuxYakj7ELOBtjBkFhje14MzbOEwrrSBagHUCQ== X-Received: by 10.99.4.3 with SMTP id 3mr1425708pge.147.1521822897775; Fri, 23 Mar 2018 09:34:57 -0700 (PDT) Received: from swboyd.mtv.corp.google.com ([2620:0:1000:1511:d30e:62c6:f82c:ff40]) by smtp.gmail.com with ESMTPSA id s78sm19131294pfa.161.2018.03.23.09.34.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 23 Mar 2018 09:34:57 -0700 (PDT) From: Stephen Boyd To: Linus Walleij Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, Timur Tabi , Bjorn Andersson , Grant Likely , linux-gpio@vger.kernel.org, Andy Shevchenko Subject: [PATCH v4 2/5] gpiolib: Extract mask allocation into subroutine Date: Fri, 23 Mar 2018 09:34:50 -0700 Message-Id: <20180323163453.96495-3-swboyd@chromium.org> X-Mailer: git-send-email 2.17.0.rc0.231.g781580f067-goog In-Reply-To: <20180323163453.96495-1-swboyd@chromium.org> References: <20180323163453.96495-1-swboyd@chromium.org> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org We're going to use similar code to allocate and set all the bits in a mask for valid gpios to use. Extract the code from the irqchip version so it can be reused. Signed-off-by: Stephen Boyd --- drivers/gpio/gpiolib.c | 20 +++++++++++++++----- 1 file changed, 15 insertions(+), 5 deletions(-) diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index d66de67ef307..cc0e1519da45 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -337,6 +337,20 @@ static int gpiochip_set_desc_names(struct gpio_chip *gc) return 0; } +static unsigned long *gpiochip_allocate_mask(struct gpio_chip *chip) +{ + unsigned long *p; + + p = kcalloc(BITS_TO_LONGS(chip->ngpio), sizeof(long), GFP_KERNEL); + if (!p) + return NULL; + + /* Assume by default all GPIOs are valid */ + bitmap_fill(p, chip->ngpio); + + return p; +} + /* * GPIO line handle management */ @@ -1506,14 +1520,10 @@ static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gpiochip) if (!gpiochip->irq.need_valid_mask) return 0; - gpiochip->irq.valid_mask = kcalloc(BITS_TO_LONGS(gpiochip->ngpio), - sizeof(long), GFP_KERNEL); + gpiochip->irq.valid_mask = gpiochip_allocate_mask(gpiochip); if (!gpiochip->irq.valid_mask) return -ENOMEM; - /* Assume by default all GPIOs are valid */ - bitmap_fill(gpiochip->irq.valid_mask, gpiochip->ngpio); - return 0; }