From patchwork Fri Jan 27 10:07:15 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Westerberg X-Patchwork-Id: 720566 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3v8vbm2vdPz9t1P for ; Fri, 27 Jan 2017 21:07:32 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754814AbdA0KH3 (ORCPT ); Fri, 27 Jan 2017 05:07:29 -0500 Received: from mga11.intel.com ([192.55.52.93]:39228 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754801AbdA0KHZ (ORCPT ); Fri, 27 Jan 2017 05:07:25 -0500 Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga102.fm.intel.com with ESMTP; 27 Jan 2017 02:07:19 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,294,1477983600"; d="scan'208";a="1087901048" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga001.jf.intel.com with ESMTP; 27 Jan 2017 02:07:17 -0800 Received: by black.fi.intel.com (Postfix, from userid 1001) id 759FAFB; Fri, 27 Jan 2017 12:07:16 +0200 (EET) From: Mika Westerberg To: Linus Walleij Cc: Heikki Krogerus , Andy Shevchenko , "David E . Box" , Mika Westerberg , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/3] pinctrl: intel: Add support for 1k additional pull-down Date: Fri, 27 Jan 2017 13:07:15 +0300 Message-Id: <20170127100716.194910-3-mika.westerberg@linux.intel.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170127100716.194910-1-mika.westerberg@linux.intel.com> References: <20170127100716.194910-1-mika.westerberg@linux.intel.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The next generation Intel GPIO hardware supports additional 1k pull-down per-pad. Add support for this to the Intel core pinctrl driver. Signed-off-by: Mika Westerberg Reviewed-by: Andy Shevchenko --- drivers/pinctrl/intel/pinctrl-intel.c | 18 +++++++++++++++++- drivers/pinctrl/intel/pinctrl-intel.h | 1 + 2 files changed, 18 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c index 012d2a8879a2..e4a0757ff46b 100644 --- a/drivers/pinctrl/intel/pinctrl-intel.c +++ b/drivers/pinctrl/intel/pinctrl-intel.c @@ -450,12 +450,14 @@ static int intel_config_get(struct pinctrl_dev *pctldev, unsigned pin, { struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); enum pin_config_param param = pinconf_to_config_param(*config); + const struct intel_community *community; u32 value, term; u32 arg = 0; if (!intel_pad_owned_by_host(pctrl, pin)) return -ENOTSUPP; + community = intel_get_community(pctrl, pin); value = readl(intel_get_padcfg(pctrl, pin, PADCFG1)); term = (value & PADCFG1_TERM_MASK) >> PADCFG1_TERM_SHIFT; @@ -491,6 +493,11 @@ static int intel_config_get(struct pinctrl_dev *pctldev, unsigned pin, return -EINVAL; switch (term) { + case PADCFG1_TERM_1K: + if (!(community->features & PINCTRL_FEATURE_1K_PD)) + return -EINVAL; + arg = 1000; + break; case PADCFG1_TERM_5K: arg = 5000; break; @@ -532,6 +539,7 @@ static int intel_config_set_pull(struct intel_pinctrl *pctrl, unsigned pin, { unsigned param = pinconf_to_config_param(config); unsigned arg = pinconf_to_config_argument(config); + const struct intel_community *community; void __iomem *padcfg1; unsigned long flags; int ret = 0; @@ -539,6 +547,7 @@ static int intel_config_set_pull(struct intel_pinctrl *pctrl, unsigned pin, raw_spin_lock_irqsave(&pctrl->lock, flags); + community = intel_get_community(pctrl, pin); padcfg1 = intel_get_padcfg(pctrl, pin, PADCFG1); value = readl(padcfg1); @@ -581,6 +590,11 @@ static int intel_config_set_pull(struct intel_pinctrl *pctrl, unsigned pin, case 5000: value |= PADCFG1_TERM_5K << PADCFG1_TERM_SHIFT; break; + case 1000: + if (!(community->features & PINCTRL_FEATURE_1K_PD)) + return -EINVAL; + value |= PADCFG1_TERM_1K << PADCFG1_TERM_SHIFT; + break; default: ret = -EINVAL; } @@ -1107,8 +1121,10 @@ int intel_pinctrl_probe(struct platform_device *pdev, u32 rev; rev = (readl(regs + REVID) & REVID_MASK) >> REVID_SHIFT; - if (rev >= 0x94) + if (rev >= 0x94) { community->features |= PINCTRL_FEATURE_DEBOUNCE; + community->features |= PINCTRL_FEATURE_1K_PD; + } } /* Read offset of the pad configuration registers */ diff --git a/drivers/pinctrl/intel/pinctrl-intel.h b/drivers/pinctrl/intel/pinctrl-intel.h index 1ff5abf309e3..fe9521f345b5 100644 --- a/drivers/pinctrl/intel/pinctrl-intel.h +++ b/drivers/pinctrl/intel/pinctrl-intel.h @@ -81,6 +81,7 @@ struct intel_community { /* Additional features supported by the hardware */ #define PINCTRL_FEATURE_DEBOUNCE BIT(0) +#define PINCTRL_FEATURE_1K_PD BIT(1) #define PIN_GROUP(n, p, m) \ { \