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[50.88.177.90]) by smtp.gmail.com with ESMTPSA id w126sm7626120yww.41.2017.01.30.10.33.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 30 Jan 2017 10:33:53 -0800 (PST) From: William Breathitt Gray To: linus.walleij@linaro.org, gnurou@gmail.com Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, William Breathitt Gray Subject: [PATCH v2 5/5] gpio: ws16c48: Add support for GPIO names Date: Mon, 30 Jan 2017 13:33:47 -0500 Message-Id: <1aa948dddef882ff00b8e92aa9abb50ae74c92ab.1485800977.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: References: Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org This patch sets the gpio_chip names option with an array of GPIO line names that match the manual documentation for the WinSystems WS16C48. This should make it easier for users to identify which GPIO line corresponds to a respective GPIO pin on the device. Signed-off-by: William Breathitt Gray --- drivers/gpio/gpio-ws16c48.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-ws16c48.c b/drivers/gpio/gpio-ws16c48.c index 65de20dfbe7a..3dd2cdf538ce 100644 --- a/drivers/gpio/gpio-ws16c48.c +++ b/drivers/gpio/gpio-ws16c48.c @@ -341,6 +341,22 @@ static irqreturn_t ws16c48_irq_handler(int irq, void *dev_id) return IRQ_HANDLED; } +#define WS16C48_NGPIO 48 +static const char *ws16c48_names[WS16C48_NGPIO] = { + "Port 0 Bit 0", "Port 0 Bit 1", "Port 0 Bit 2", "Port 0 Bit 3", + "Port 0 Bit 4", "Port 0 Bit 5", "Port 0 Bit 6", "Port 0 Bit 7", + "Port 1 Bit 0", "Port 1 Bit 1", "Port 1 Bit 2", "Port 1 Bit 3", + "Port 1 Bit 4", "Port 1 Bit 5", "Port 1 Bit 6", "Port 1 Bit 7", + "Port 2 Bit 0", "Port 2 Bit 1", "Port 2 Bit 2", "Port 2 Bit 3", + "Port 2 Bit 4", "Port 2 Bit 5", "Port 2 Bit 6", "Port 2 Bit 7", + "Port 3 Bit 0", "Port 3 Bit 1", "Port 3 Bit 2", "Port 3 Bit 3", + "Port 3 Bit 4", "Port 3 Bit 5", "Port 3 Bit 6", "Port 3 Bit 7", + "Port 4 Bit 0", "Port 4 Bit 1", "Port 4 Bit 2", "Port 4 Bit 3", + "Port 4 Bit 4", "Port 4 Bit 5", "Port 4 Bit 6", "Port 4 Bit 7", + "Port 5 Bit 0", "Port 5 Bit 1", "Port 5 Bit 2", "Port 5 Bit 3", + "Port 5 Bit 4", "Port 5 Bit 5", "Port 5 Bit 6", "Port 5 Bit 7" +}; + static int ws16c48_probe(struct device *dev, unsigned int id) { struct ws16c48_gpio *ws16c48gpio; @@ -361,7 +377,8 @@ static int ws16c48_probe(struct device *dev, unsigned int id) ws16c48gpio->chip.parent = dev; ws16c48gpio->chip.owner = THIS_MODULE; ws16c48gpio->chip.base = -1; - ws16c48gpio->chip.ngpio = 48; + ws16c48gpio->chip.ngpio = WS16C48_NGPIO; + ws16c48gpio->chip.names = ws16c48_names; ws16c48gpio->chip.get_direction = ws16c48_gpio_get_direction; ws16c48gpio->chip.direction_input = ws16c48_gpio_direction_input; ws16c48gpio->chip.direction_output = ws16c48_gpio_direction_output;