| Message ID | 1653907728-27235-1-git-send-email-haibo.chen@nxp.com |
|---|---|
| State | New |
| Headers | show |
| Series | gpio: pca953x: use the correct register address to do regcache sync | expand |
On Mon, May 30, 2022 at 1:02 PM <haibo.chen@nxp.com> wrote: > > From: Haibo Chen <haibo.chen@nxp.com> > > For regcache_sync_region, need to use pca953x_recalc_addr() to get > the real register address. > > Fixes: b76574300504 ("gpio: pca953x: Restore registers after suspend/resume cycle") > Signed-off-by: Haibo Chen <haibo.chen@nxp.com> > --- > drivers/gpio/gpio-pca953x.c | 19 +++++++++++-------- > 1 file changed, 11 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c > index b444c6ab958b..08bc52c3cdcb 100644 > --- a/drivers/gpio/gpio-pca953x.c > +++ b/drivers/gpio/gpio-pca953x.c > @@ -1120,20 +1120,21 @@ static int pca953x_regcache_sync(struct device *dev) > { > struct pca953x_chip *chip = dev_get_drvdata(dev); > int ret; > + u8 regaddr; > > /* > * The ordering between direction and output is important, > * sync these registers first and only then sync the rest. > */ > - ret = regcache_sync_region(chip->regmap, chip->regs->direction, > - chip->regs->direction + NBANK(chip)); > + regaddr = pca953x_recalc_addr(chip, chip->regs->direction, 0); > + ret = regcache_sync_region(chip->regmap, regaddr, regaddr + NBANK(chip)); > if (ret) { > dev_err(dev, "Failed to sync GPIO dir registers: %d\n", ret); > return ret; > } > > - ret = regcache_sync_region(chip->regmap, chip->regs->output, > - chip->regs->output + NBANK(chip)); > + regaddr = pca953x_recalc_addr(chip, chip->regs->output, 0); > + ret = regcache_sync_region(chip->regmap, regaddr, regaddr + NBANK(chip)); > if (ret) { > dev_err(dev, "Failed to sync GPIO out registers: %d\n", ret); > return ret; > @@ -1141,16 +1142,18 @@ static int pca953x_regcache_sync(struct device *dev) > > #ifdef CONFIG_GPIO_PCA953X_IRQ > if (chip->driver_data & PCA_PCAL) { > - ret = regcache_sync_region(chip->regmap, PCAL953X_IN_LATCH, > - PCAL953X_IN_LATCH + NBANK(chip)); > + regaddr = pca953x_recalc_addr(chip, PCAL953X_IN_LATCH, 0); > + ret = regcache_sync_region(chip->regmap, regaddr, > + regaddr + NBANK(chip)); > if (ret) { > dev_err(dev, "Failed to sync INT latch registers: %d\n", > ret); > return ret; > } > > - ret = regcache_sync_region(chip->regmap, PCAL953X_INT_MASK, > - PCAL953X_INT_MASK + NBANK(chip)); > + regaddr = pca953x_recalc_addr(chip, PCAL953X_INT_MASK, 0); > + ret = regcache_sync_region(chip->regmap, regaddr, > + regaddr + NBANK(chip)); > if (ret) { > dev_err(dev, "Failed to sync INT mask registers: %d\n", > ret); > -- > 2.25.1 > Queued for fixes, thanks! Bart
diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index b444c6ab958b..08bc52c3cdcb 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -1120,20 +1120,21 @@ static int pca953x_regcache_sync(struct device *dev) { struct pca953x_chip *chip = dev_get_drvdata(dev); int ret; + u8 regaddr; /* * The ordering between direction and output is important, * sync these registers first and only then sync the rest. */ - ret = regcache_sync_region(chip->regmap, chip->regs->direction, - chip->regs->direction + NBANK(chip)); + regaddr = pca953x_recalc_addr(chip, chip->regs->direction, 0); + ret = regcache_sync_region(chip->regmap, regaddr, regaddr + NBANK(chip)); if (ret) { dev_err(dev, "Failed to sync GPIO dir registers: %d\n", ret); return ret; } - ret = regcache_sync_region(chip->regmap, chip->regs->output, - chip->regs->output + NBANK(chip)); + regaddr = pca953x_recalc_addr(chip, chip->regs->output, 0); + ret = regcache_sync_region(chip->regmap, regaddr, regaddr + NBANK(chip)); if (ret) { dev_err(dev, "Failed to sync GPIO out registers: %d\n", ret); return ret; @@ -1141,16 +1142,18 @@ static int pca953x_regcache_sync(struct device *dev) #ifdef CONFIG_GPIO_PCA953X_IRQ if (chip->driver_data & PCA_PCAL) { - ret = regcache_sync_region(chip->regmap, PCAL953X_IN_LATCH, - PCAL953X_IN_LATCH + NBANK(chip)); + regaddr = pca953x_recalc_addr(chip, PCAL953X_IN_LATCH, 0); + ret = regcache_sync_region(chip->regmap, regaddr, + regaddr + NBANK(chip)); if (ret) { dev_err(dev, "Failed to sync INT latch registers: %d\n", ret); return ret; } - ret = regcache_sync_region(chip->regmap, PCAL953X_INT_MASK, - PCAL953X_INT_MASK + NBANK(chip)); + regaddr = pca953x_recalc_addr(chip, PCAL953X_INT_MASK, 0); + ret = regcache_sync_region(chip->regmap, regaddr, + regaddr + NBANK(chip)); if (ret) { dev_err(dev, "Failed to sync INT mask registers: %d\n", ret);