From patchwork Mon Sep 5 14:31:32 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 665853 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3sSXJC4DN6z9ryZ for ; Tue, 6 Sep 2016 00:32:43 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=baylibre-com.20150623.gappssmtp.com header.i=@baylibre-com.20150623.gappssmtp.com header.b=p+28+TxC; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755257AbcIEOcG (ORCPT ); Mon, 5 Sep 2016 10:32:06 -0400 Received: from mail-wm0-f50.google.com ([74.125.82.50]:36114 "EHLO mail-wm0-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754946AbcIEObq (ORCPT ); Mon, 5 Sep 2016 10:31:46 -0400 Received: by mail-wm0-f50.google.com with SMTP id b187so22471205wme.1 for ; Mon, 05 Sep 2016 07:31:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=LnMsE4qppmM7OcDm4PdCFHDCKyreR7LxkAkqKZ1OMD8=; b=p+28+TxCx4H++Y3IQ6VmmTr5g0hjeR53faUXzSl1Ch/xi+eJ2a1GIV9wFqzkhnKmij Pk+A1nkfwvqg7EdJRdTvcVDuHM5v8B7XUe4DuwKMo/nGyyCyWZXPBccdwm0/9ev/kF9m nsnXOLqBSOii5OV58fG2KoUKySDrvYD6UbeR81eLl12gz19T+1gioHUJMxdC7kGppbPk QsCZkGu15RpjYFY/yQJ5q4lPH6iYtNs9wgWbbs1z0VB//5LozHN9C4ZbkuWrX1x7IH/4 lQJ3YxvbynYOnXi64G/3j2XIOqYEToEdr46kPkuegn8Lz+P6FlQlIG5Y44Gtmrh8BEVi lyCQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=LnMsE4qppmM7OcDm4PdCFHDCKyreR7LxkAkqKZ1OMD8=; b=I0nth3b2y8mdWM0cKRjfivYEOkItKwQhKQwjU7Hr1KgGcTk497R4Lk6lFly4Y4kVAn gRs+dFZNff1sEAeThA6m4lt/GW6E0TrPCTaGb43CtyQxOuZ5ZlYPqO4l2TgzkmTaeL0N 7fHKfUP4S0VO0hHheBglRiW22v2DoCJDaOFRkuCvJ5nzQwhUmksxcfotiPvWYme/C07G 4woVWhHv6ns6+Tc3iaaJmPb0n+x0szUioOGLy/6gpNpWfFWzOjFD87b/ra1sum27+k5x 8L0/FDVyyUpl9sM68+5VAAoDvOD0SPX4X/p2O3YJPjOKjGwJnaEX5y5XQrBRX38gMVtH 7VaQ== X-Gm-Message-State: AE9vXwP0yfqJwxqxyHYmF0wxfNoYTuqZNe2s8aJ6vThC2WFHNDQPy/cFE+AYY/UVWXOS4ELM X-Received: by 10.28.87.14 with SMTP id l14mr15061812wmb.71.1473085904192; Mon, 05 Sep 2016 07:31:44 -0700 (PDT) Received: from localhost.localdomain ([90.63.244.31]) by smtp.gmail.com with ESMTPSA id bc10sm28017507wjc.32.2016.09.05.07.31.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 05 Sep 2016 07:31:43 -0700 (PDT) From: Bartosz Golaszewski To: Linus Walleij , Alexandre Courbot , Andy Shevchenko , Vignesh R , Yong Li , Geert Uytterhoeven Cc: linux-gpio , LKML , Bartosz Golaszewski Subject: [PATCH 2/5] gpio: pca953x: code shrink Date: Mon, 5 Sep 2016 16:31:32 +0200 Message-Id: <1473085895-31711-3-git-send-email-bgolaszewski@baylibre.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1473085895-31711-1-git-send-email-bgolaszewski@baylibre.com> References: <1473085895-31711-1-git-send-email-bgolaszewski@baylibre.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org There are multiple places in the driver code where a switch (chip->chip_type) is used to determine the proper register offset. Unduplicate the code by adding a simple structure holding the possible offsets that differ between the pca953x and pca957x chip families and use it to avoid the checks. Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-pca953x.c | 122 +++++++++++++++----------------------------- 1 file changed, 42 insertions(+), 80 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 2312f8d..17cba0a 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -94,6 +94,24 @@ MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids); #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ) +struct pca953x_offset { + int direction; + int output; + int input; +}; + +static struct pca953x_offset pca953x_offsets = { + .direction = PCA953X_DIRECTION, + .output = PCA953X_OUTPUT, + .input = PCA953X_INPUT, +}; + +static struct pca953x_offset pca957x_offsets = { + .direction = PCA957X_CFG, + .output = PCA957X_OUT, + .input = PCA957X_IN, +}; + struct pca953x_chip { unsigned gpio_start; u8 reg_output[MAX_BANK]; @@ -113,6 +131,8 @@ struct pca953x_chip { const char *const *names; int chip_type; unsigned long driver_data; + + struct pca953x_offset *offset; }; static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val, @@ -222,20 +242,12 @@ static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off) { struct pca953x_chip *chip = gpiochip_get_data(gc); u8 reg_val; - int ret, offset = 0; + int ret; mutex_lock(&chip->i2c_lock); reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ)); - switch (chip->chip_type) { - case PCA953X_TYPE: - offset = PCA953X_DIRECTION; - break; - case PCA957X_TYPE: - offset = PCA957X_CFG; - break; - } - ret = pca953x_write_single(chip, offset, reg_val, off); + ret = pca953x_write_single(chip, chip->offset->direction, reg_val, off); if (ret) goto exit; @@ -250,7 +262,7 @@ static int pca953x_gpio_direction_output(struct gpio_chip *gc, { struct pca953x_chip *chip = gpiochip_get_data(gc); u8 reg_val; - int ret, offset = 0; + int ret; mutex_lock(&chip->i2c_lock); /* set output level */ @@ -261,15 +273,7 @@ static int pca953x_gpio_direction_output(struct gpio_chip *gc, reg_val = chip->reg_output[off / BANK_SZ] & ~(1u << (off % BANK_SZ)); - switch (chip->chip_type) { - case PCA953X_TYPE: - offset = PCA953X_OUTPUT; - break; - case PCA957X_TYPE: - offset = PCA957X_OUT; - break; - } - ret = pca953x_write_single(chip, offset, reg_val, off); + ret = pca953x_write_single(chip, chip->offset->output, reg_val, off); if (ret) goto exit; @@ -277,15 +281,7 @@ static int pca953x_gpio_direction_output(struct gpio_chip *gc, /* then direction */ reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ)); - switch (chip->chip_type) { - case PCA953X_TYPE: - offset = PCA953X_DIRECTION; - break; - case PCA957X_TYPE: - offset = PCA957X_CFG; - break; - } - ret = pca953x_write_single(chip, offset, reg_val, off); + ret = pca953x_write_single(chip, chip->offset->direction, reg_val, off); if (ret) goto exit; @@ -299,18 +295,10 @@ static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off) { struct pca953x_chip *chip = gpiochip_get_data(gc); u32 reg_val; - int ret, offset = 0; + int ret; mutex_lock(&chip->i2c_lock); - switch (chip->chip_type) { - case PCA953X_TYPE: - offset = PCA953X_INPUT; - break; - case PCA957X_TYPE: - offset = PCA957X_IN; - break; - } - ret = pca953x_read_single(chip, offset, ®_val, off); + ret = pca953x_read_single(chip, chip->offset->input, ®_val, off); mutex_unlock(&chip->i2c_lock); if (ret < 0) { /* NOTE: diagnostic already emitted; that's all we should @@ -327,7 +315,7 @@ static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) { struct pca953x_chip *chip = gpiochip_get_data(gc); u8 reg_val; - int ret, offset = 0; + int ret; mutex_lock(&chip->i2c_lock); if (val) @@ -337,15 +325,7 @@ static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) reg_val = chip->reg_output[off / BANK_SZ] & ~(1u << (off % BANK_SZ)); - switch (chip->chip_type) { - case PCA953X_TYPE: - offset = PCA953X_OUTPUT; - break; - case PCA957X_TYPE: - offset = PCA957X_OUT; - break; - } - ret = pca953x_write_single(chip, offset, reg_val, off); + ret = pca953x_write_single(chip, chip->offset->output, reg_val, off); if (ret) goto exit; @@ -359,19 +339,10 @@ static void pca953x_gpio_set_multiple(struct gpio_chip *gc, { struct pca953x_chip *chip = gpiochip_get_data(gc); u8 reg_val[MAX_BANK]; - int ret, bank, offset = 0; + int ret, bank; int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); unsigned int bankmask, bankval; - switch (chip->chip_type) { - case PCA953X_TYPE: - offset = PCA953X_OUTPUT; - break; - case PCA957X_TYPE: - offset = PCA957X_OUT; - break; - } - memcpy(reg_val, chip->reg_output, NBANK(chip)); mutex_lock(&chip->i2c_lock); for (bank = 0; bank < NBANK(chip); bank++) { @@ -384,7 +355,9 @@ static void pca953x_gpio_set_multiple(struct gpio_chip *gc, } } - ret = i2c_smbus_write_i2c_block_data(chip->client, offset << bank_shift, NBANK(chip), reg_val); + ret = i2c_smbus_write_i2c_block_data(chip->client, + chip->offset->output << bank_shift, + NBANK(chip), reg_val); if (ret) goto exit; @@ -516,7 +489,7 @@ static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending) bool pending_seen = false; bool trigger_seen = false; u8 trigger[MAX_BANK]; - int ret, i, offset = 0; + int ret, i; if (chip->driver_data & PCA_PCAL) { /* Read the current interrupt status from the device */ @@ -541,15 +514,7 @@ static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending) return pending_seen; } - switch (chip->chip_type) { - case PCA953X_TYPE: - offset = PCA953X_INPUT; - break; - case PCA957X_TYPE: - offset = PCA957X_IN; - break; - } - ret = pca953x_read_regs(chip, offset, cur_stat); + ret = pca953x_read_regs(chip, chip->offset->input, cur_stat); if (ret) return false; @@ -609,20 +574,13 @@ static int pca953x_irq_setup(struct pca953x_chip *chip, int irq_base) { struct i2c_client *client = chip->client; - int ret, i, offset = 0; + int ret, i; if (client->irq && irq_base != -1 && (chip->driver_data & PCA_INT)) { - switch (chip->chip_type) { - case PCA953X_TYPE: - offset = PCA953X_INPUT; - break; - case PCA957X_TYPE: - offset = PCA957X_IN; - break; - } - ret = pca953x_read_regs(chip, offset, chip->irq_stat); + ret = pca953x_read_regs(chip, + chip->offset->input, chip->irq_stat); if (ret) return ret; @@ -685,6 +643,8 @@ static int device_pca953x_init(struct pca953x_chip *chip, u32 invert) int ret; u8 val[MAX_BANK]; + chip->offset = &pca953x_offsets; + ret = pca953x_read_regs(chip, PCA953X_OUTPUT, chip->reg_output); if (ret) goto out; @@ -710,6 +670,8 @@ static int device_pca957x_init(struct pca953x_chip *chip, u32 invert) int ret; u8 val[MAX_BANK]; + chip->offset = &pca957x_offsets; + ret = pca953x_read_regs(chip, PCA957X_OUT, chip->reg_output); if (ret) goto out;