From patchwork Fri Aug 19 10:53:42 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Gorski X-Patchwork-Id: 660814 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3sG0G70d4pz9t1G for ; Fri, 19 Aug 2016 20:54:23 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=w3Brb4PD; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754635AbcHSKyS (ORCPT ); Fri, 19 Aug 2016 06:54:18 -0400 Received: from mail-wm0-f66.google.com ([74.125.82.66]:32793 "EHLO mail-wm0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754586AbcHSKyQ (ORCPT ); Fri, 19 Aug 2016 06:54:16 -0400 Received: by mail-wm0-f66.google.com with SMTP id o80so2963731wme.0; Fri, 19 Aug 2016 03:54:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=66aUr3uNG1VVzNSj6HVWs5uVDroPU9CQKfEhkYtvsh4=; b=w3Brb4PDrqtBZ945bgAeiPWj4SbvZi1a3UtPkPiZgQihwjoGAiD0itkHuNvuLWISK6 KbASDOpTTl2oSAY784PS7uBhEifP2ZB86iAH7/crnIin8xLMXT0x6rZZeZ3dvkMijqfE sBk2gv/ATneueT7l/GkdNjrcvBGGoIhQ8hTOqRg3OACnwDR4xBPqIVPQ9blXQheM2Hy9 F0bkEzDBI3o92cwXMVBDSXylcCt+bQl3MhFHJYvmN4JEcVUG4Ln4N0FnuQ+3p8FwCH8I KHlgWAmnLX0P10S4JnAa+w8cI601rAw2vEW61hxQUV0Iyw26OrHmZD+eHAxSQPyE/RSa WAEg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=66aUr3uNG1VVzNSj6HVWs5uVDroPU9CQKfEhkYtvsh4=; b=Fk2FoP4pOEECVNJX0KmMUHeJ9cosR++Z8+q9BKL6HJbzdaZdS2YuAsTQlbW1l6dtaD fbbb/36D5lxhLcQANDmfGyKWapQtZ/w1fMdxNIrLC1fmvzRaGfVHb4pdU1hQFOYf9yDr dtwYOFfu9YsVI8VtNC+8m23GVX7zUi1ERzW+mik3c0Ik6bKhfwT6puX7x/+25z+wSnu+ uSzytsemPi1No8iiURIlX1Ot7Gz/wsZzs8VTYxrejTCPFWyghxmMDw9N58Ku4SpI7OSm JFMUmb7Dk8waaiivbLtb9qSpzLCfUAJjIsSxI7ekXHCURkjAQ4m+vbHJdvPdu1xGAkSH TAzA== X-Gm-Message-State: AEkooutSsoHrNAEgcqMoxN8hZdhkJ28L10rV0cp9BVLsAgspweztEM00XY4jVdMncvBHVw== X-Received: by 10.28.28.70 with SMTP id c67mr3658900wmc.8.1471604054690; Fri, 19 Aug 2016 03:54:14 -0700 (PDT) Received: from localhost.localdomain ([2001:470:9e39::48e]) by smtp.gmail.com with ESMTPSA id g67sm3919066wme.5.2016.08.19.03.54.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 19 Aug 2016 03:54:14 -0700 (PDT) From: Jonas Gorski To: linux-gpio@vger.kernel.org Cc: Linus Walleij , devicetree@vger.kernel.org, Rob Herring , Mark Rutland , Kevin Cernekee , Florian Fainelli , =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= Subject: [PATCH 10/13] Documentation: add BCM6368 pincontroller binding documentation Date: Fri, 19 Aug 2016 12:53:42 +0200 Message-Id: <1471604025-21575-11-git-send-email-jonas.gorski@gmail.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1471604025-21575-1-git-send-email-jonas.gorski@gmail.com> References: <1471604025-21575-1-git-send-email-jonas.gorski@gmail.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add binding documentation for the pincontrol core found in BCM6368 SoCs. Signed-off-by: Jonas Gorski --- .../bindings/pinctrl/brcm,bcm6368-pinctrl.txt | 67 ++++++++++++++++++++++ 1 file changed, 67 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.txt diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.txt new file mode 100644 index 0000000..59c466e --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.txt @@ -0,0 +1,67 @@ +* Broadcom BCM6368 pin controller + +Required properties: +- compatible: Must be "brcm,bcm6368-pinctrl". +- reg: Register specifiers of dirout, dat, mode registers. +- reg-names: Must be "dirout", "dat", "mode". +- brcm,gpiobasemode: Phandle to the gpio basemode register. +- gpio-controller: Identifies this node as a GPIO controller. +- #gpio-cells: Must be <2>. + +Example: + +pinctrl: pin-controller@10000080 { + compatible = "brcm,bcm6368-pinctrl"; + reg = <0x10000080 0x08>, + <0x10000088 0x08>, + <0x10000098 0x04>; + reg-names = "dirout", "dat", "mode"; + brcm,gpiobasemode = <&gpiobasemode>; + + gpio-controller; + #gpio-cells = <2>; +}; + +gpiobasemode: syscon@100000b8 { + compatible = "brcm,bcm6368-gpiobasemode", "syscon"; + reg = <0x100000b8 4>; + native-endian; +}; + +Available pins/groups and functions: + +name pins functions +----------------------------------------------------------- +gpio0 0 analog_afe0 +gpio1 1 analog_afe1 +gpio2 2 sys_irq +gpio3 3 serial_led_data +gpio4 4 serial_led_clk +gpio5 5 inet_led +gpio6 6 ephy0_led +gpio7 7 ephy1_led +gpio8 8 ephy2_led +gpio9 9 ephy3_led +gpio10 10 robosw_led_data +gpio11 11 robosw_led_clk +gpio12 12 robosw_led0 +gpio13 13 robosw_led1 +gpio14 14 usb_device_led +gpio15 15 - +gpio16 16 pci_req1 +gpio17 17 pci_gnt1 +gpio18 18 pci_intb +gpio19 19 pci_req0 +gpio20 20 pci_gnt0 +gpio21 21 - +gpio22 22 pcmcia_cd1 +gpio23 23 pcmcia_cd2 +gpio24 24 pcmcia_vs1 +gpio25 25 pcmcia_vs2 +gpio26 26 ebi_cs2 +gpio27 27 ebi_cs3 +gpio28 28 spi_cs2 +gpio29 29 spi_cs3 +gpio30 30 spi_cs4 +gpio31 31 spi_cs5 +uart1_grp 30-33 uart1