From patchwork Fri Jul 1 06:42:13 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= X-Patchwork-Id: 642832 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3rgn0X5Rjzz9sdQ for ; Fri, 1 Jul 2016 16:42:52 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932083AbcGAGmd (ORCPT ); Fri, 1 Jul 2016 02:42:33 -0400 Received: from metis.ext.4.pengutronix.de ([92.198.50.35]:55035 "EHLO metis.ext.4.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752622AbcGAGmd (ORCPT ); Fri, 1 Jul 2016 02:42:33 -0400 Received: from dude.hi.pengutronix.de ([2001:67c:670:100:1d::7]) by metis.ext.pengutronix.de with esmtps (TLS1.2:RSA_AES_256_CBC_SHA1:256) (Exim 4.80) (envelope-from ) id 1bIs9e-0004SD-S9; Fri, 01 Jul 2016 08:42:22 +0200 Received: from ukl by dude.hi.pengutronix.de with local (Exim 4.87) (envelope-from ) id 1bIs9c-0003HY-Vi; Fri, 01 Jul 2016 08:42:20 +0200 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= To: Linus Walleij , Alexandre Courbot , Rob Herring , Mark Rutland Cc: kernel@pengutronix.de, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH] gpio: document how to order GPIO controllers Date: Fri, 1 Jul 2016 08:42:13 +0200 Message-Id: <1467355333-8813-1-git-send-email-u.kleine-koenig@pengutronix.de> X-Mailer: git-send-email 2.8.1 MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::7 X-SA-Exim-Mail-From: ukl@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-gpio@vger.kernel.org Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org This uses the same approach that is already used for spi, i2c and several other controllers to ensure a consistent numbering independent of probe order. This is in use for several gpio drivers that already now use of_alias_get_id(np, "gpio"). Signed-off-by: Uwe Kleine-König --- Hello, Linus requested such a patch as part of a change that introduces this mechanism to the gpio-omap driver[1]. IMHO this is better done in a separate patch, so here it comes. Best regards Uwe [1] http://thread.gmane.org/gmane.linux.kernel.gpio/17399/focus=17629 Documentation/devicetree/bindings/gpio/gpio.txt | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/Documentation/devicetree/bindings/gpio/gpio.txt b/Documentation/devicetree/bindings/gpio/gpio.txt index 68d28f62a6f4..5dbacc8f094a 100644 --- a/Documentation/devicetree/bindings/gpio/gpio.txt +++ b/Documentation/devicetree/bindings/gpio/gpio.txt @@ -227,6 +227,24 @@ Example of two SOC GPIO banks defined as gpio-controller nodes: #gpio-cells = <2>; }; +Usually the GPIO banks in SoCs are ordered, that is there is a dedicated "first +gpio bank". To fix this ordering in the device tree use aliases starting at 0 +(even if the first bank is called "GPIO1" in the hardware reference). +This is necessary/handy to ensure deterministical numbering of GPIOs and GPIO +controllers. + +Example of a machine having 4 GPIO banks. + + / { + aliases { + ... + gpio0 = &gpio1; + gpio1 = &gpio2; + gpio2 = &gpio3; + gpio3 = &gpio4; + }; + }; + 2.1) gpio- and pin-controller interaction -----------------------------------------