From patchwork Thu May 26 21:24:24 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kevin Hilman X-Patchwork-Id: 626895 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3rG2GS324Yz9snm for ; Fri, 27 May 2016 07:24:32 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=baylibre-com.20150623.gappssmtp.com header.i=@baylibre-com.20150623.gappssmtp.com header.b=LT2jRZzi; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755289AbcEZVYc (ORCPT ); Thu, 26 May 2016 17:24:32 -0400 Received: from mail-pa0-f43.google.com ([209.85.220.43]:36781 "EHLO mail-pa0-f43.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755127AbcEZVYb (ORCPT ); Thu, 26 May 2016 17:24:31 -0400 Received: by mail-pa0-f43.google.com with SMTP id eu11so23954734pad.3 for ; Thu, 26 May 2016 14:24:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=l9068VGzqvtvtizZtGtFqIUdpMl7HYQ5AxvcQE5Yj+o=; b=LT2jRZzi7ee8s8YhBujzncE3seWv01ZRbZXjCMA0S45rcayNYXlo1OaBOdrSMGdEy3 1zAzXzhjnZyfZk/hQDXXBzWsTPWOm/Jsa6yEYoKLSWshZn1LK5I42Wa7KtcWSAjNFCKb pBU9daxSCf8YBfzm1Tq95ZJfdAuvsxIMIBErC9aIrj+ud/qENlvOYFm4Uj86Vo4GR2OP e9vnZnTUKtHVT/uxTNQrr9citqSDK2n7bf21sBQttxh8ehh7mgMQqYYFWV8jRYkwsJgw /tYsh2C5uL5z0X4XTe2P8bWfmU9jtEfdTrpaXrwBO2DJkjgfmIBetx0X0sZcM9yQ+khf oOQA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=l9068VGzqvtvtizZtGtFqIUdpMl7HYQ5AxvcQE5Yj+o=; b=edZ4jYye7WZ/L0Z9qQuZO71B8bAF3hhL1wvspxtE76el63RyOzAvYJkWXXj7d8MTlN kDivMKBhrK11+YkxupJP5P6JzFRC3hwajbQYmUa75gMrkg4FftK3ZR1+ylUYU0uXBw+L inuzZdg2qnaY0XR+bbr3tVKEJjdpaafGFLoGTCSg2I8cLmyd22DlvCteTMgVfLrHg+np IpfdEwmTRiIxT3OA4EC0whiC0VZtd0KxRjmjaovDtjHyMnj/WMHPgoZYSpyRStZKixe+ 0h800dIDWyaMfhCaWJTPRYxIBIXLilO9UPc/u1YuCp+HPsjt/CrcloU+yi0ZsWTr0RqA lGEA== X-Gm-Message-State: ALyK8tK6mXklHgJnWqarIk9wh7iscBSEumriyIxJFC5eIacv7wlbYbLCNuqXvKPMulidYRe6 X-Received: by 10.66.183.168 with SMTP id en8mr17143409pac.64.1464297870501; Thu, 26 May 2016 14:24:30 -0700 (PDT) Received: from localhost (c-98-203-232-209.hsd1.wa.comcast.net. [98.203.232.209]) by smtp.gmail.com with ESMTPSA id 19sm8220049pfu.83.2016.05.26.14.24.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 26 May 2016 14:24:29 -0700 (PDT) From: Kevin Hilman To: Linus Walleij , linux-gpio@vger.kernel.org Cc: linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Carlo Caione , Victor Wan , Jerry Cao , Xing Wu Subject: [PATCH v2 3/4] pinctrl: amlogic: gxbb: add more UART pins Date: Thu, 26 May 2016 14:24:24 -0700 Message-Id: <1464297865-8965-4-git-send-email-khilman@baylibre.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1464297865-8965-1-git-send-email-khilman@baylibre.com> References: <1464297865-8965-1-git-send-email-khilman@baylibre.com> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add EE domain pins for UART A, B & C. Acked-by: Carlo Caione Signed-off-by: Kevin Hilman --- drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 48 ++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c index f0459f26c16c..b2ec5f8ada33 100644 --- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c +++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c @@ -163,6 +163,21 @@ static const unsigned int sdcard_d3_pins[] = { PIN(CARD_4, EE_OFF) }; static const unsigned int sdcard_cmd_pins[] = { PIN(CARD_3, EE_OFF) }; static const unsigned int sdcard_clk_pins[] = { PIN(CARD_2, EE_OFF) }; +static const unsigned int uart_tx_a_pins[] = { PIN(GPIOX_12, EE_OFF) }; +static const unsigned int uart_rx_a_pins[] = { PIN(GPIOX_13, EE_OFF) }; +static const unsigned int uart_cts_a_pins[] = { PIN(GPIOX_14, EE_OFF) }; +static const unsigned int uart_rts_a_pins[] = { PIN(GPIOX_15, EE_OFF) }; + +static const unsigned int uart_tx_b_pins[] = { PIN(GPIODV_24, EE_OFF) }; +static const unsigned int uart_rx_b_pins[] = { PIN(GPIODV_25, EE_OFF) }; +static const unsigned int uart_cts_b_pins[] = { PIN(GPIODV_26, EE_OFF) }; +static const unsigned int uart_rts_b_pins[] = { PIN(GPIODV_27, EE_OFF) }; + +static const unsigned int uart_tx_c_pins[] = { PIN(GPIOY_13, EE_OFF) }; +static const unsigned int uart_rx_c_pins[] = { PIN(GPIOY_14, EE_OFF) }; +static const unsigned int uart_cts_c_pins[] = { PIN(GPIOX_11, EE_OFF) }; +static const unsigned int uart_rts_c_pins[] = { PIN(GPIOX_12, EE_OFF) }; + static const struct pinctrl_pin_desc meson_gxbb_aobus_pins[] = { MESON_PIN(GPIOAO_0, 0), MESON_PIN(GPIOAO_1, 0), @@ -324,6 +339,24 @@ static struct meson_pmx_group meson_gxbb_periphs_groups[] = { GPIO_GROUP(GPIO_TEST_N, EE_OFF), + /* Bank X */ + GROUP(uart_tx_a, 4, 13), + GROUP(uart_rx_a, 4, 12), + GROUP(uart_cts_a, 4, 11), + GROUP(uart_rts_a, 4, 10), + + /* Bank Y */ + GROUP(uart_cts_c, 1, 19), + GROUP(uart_rts_c, 1, 18), + GROUP(uart_tx_c, 1, 17), + GROUP(uart_rx_c, 1, 16), + + /* Bank DV */ + GROUP(uart_tx_b, 2, 29), + GROUP(uart_rx_b, 2, 28), + GROUP(uart_cts_b, 2, 27), + GROUP(uart_rts_b, 2, 26), + /* Bank BOOT */ GROUP(emmc_nand_d07, 4, 30), GROUP(emmc_clk, 4, 18), @@ -416,6 +449,18 @@ static const char * const sdcard_groups[] = { "sdcard_cmd", "sdcard_clk", }; +static const char * const uart_a_groups[] = { + "uart_tx_a", "uart_rx_a", "uart_cts_a", "uart_rts_a", +}; + +static const char * const uart_b_groups[] = { + "uart_tx_b", "uart_rx_b", "uart_cts_b", "uart_rts_b", +}; + +static const char * const uart_c_groups[] = { + "uart_tx_c", "uart_rx_c", "uart_cts_c", "uart_rts_c", +}; + static const char * const gpio_aobus_groups[] = { "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", "GPIOAO_4", "GPIOAO_5", "GPIOAO_6", "GPIOAO_7", "GPIOAO_8", "GPIOAO_9", @@ -442,6 +487,9 @@ static struct meson_pmx_func meson_gxbb_periphs_functions[] = { FUNCTION(gpio_periphs), FUNCTION(emmc), FUNCTION(sdcard), + FUNCTION(uart_a), + FUNCTION(uart_b), + FUNCTION(uart_c), }; static struct meson_pmx_func meson_gxbb_aobus_functions[] = {