From patchwork Tue Apr 12 14:56:45 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laxman Dewangan X-Patchwork-Id: 609457 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3qkr4G4RPLz9t3n for ; Wed, 13 Apr 2016 01:11:26 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934138AbcDLPKj (ORCPT ); Tue, 12 Apr 2016 11:10:39 -0400 Received: from hqemgate15.nvidia.com ([216.228.121.64]:15854 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933499AbcDLPKh (ORCPT ); Tue, 12 Apr 2016 11:10:37 -0400 Received: from hqnvupgp07.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com id ; Tue, 12 Apr 2016 08:10:27 -0700 Received: from HQMAIL105.nvidia.com ([172.20.187.12]) by hqnvupgp07.nvidia.com (PGP Universal service); Tue, 12 Apr 2016 08:08:08 -0700 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Tue, 12 Apr 2016 08:08:08 -0700 Received: from DRUKMAIL101.nvidia.com (10.25.59.19) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1130.7; Tue, 12 Apr 2016 15:10:35 +0000 Received: from HQMAIL103.nvidia.com (172.20.187.11) by drukmail101.nvidia.com (10.25.59.19) with Microsoft SMTP Server (TLS) id 15.0.1130.7; Tue, 12 Apr 2016 15:10:30 +0000 Received: from ldewanganubuntu-System-Product-Name.nvidia.com (172.20.13.39) by HQMAIL103.nvidia.com (172.20.187.11) with Microsoft SMTP Server id 15.0.1130.7 via Frontend Transport; Tue, 12 Apr 2016 15:10:26 +0000 From: Laxman Dewangan To: , , , , , , CC: , , , , Laxman Dewangan Subject: [PATCH 5/7] soc/tegra: pmc: Register sub-devices of PMC Date: Tue, 12 Apr 2016 20:26:45 +0530 Message-ID: <1460473007-11535-6-git-send-email-ldewangan@nvidia.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1460473007-11535-1-git-send-email-ldewangan@nvidia.com> References: <1460473007-11535-1-git-send-email-ldewangan@nvidia.com> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Register sub devices of the PMC to support multiple functionalities of PMC. The sub devices are the subnode of PMC DT node with containing the compatible string of sub devices as follows: pmc@0,7000e400 { pmc-pad-control { compatible = "nvidia,tegra210-io-pad"; :: }; }; In this pmc-pad-control is the sub device of PMC and the device compatibility is nvidia,tegra210-io-pad. Signed-off-by: Laxman Dewangan --- drivers/soc/tegra/pmc.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c index 968f7cb..c044f3b 100644 --- a/drivers/soc/tegra/pmc.c +++ b/drivers/soc/tegra/pmc.c @@ -32,6 +32,7 @@ #include #include #include +#include #include #include #include @@ -1002,6 +1003,11 @@ static int tegra_pmc_probe(struct platform_device *pdev) pmc->base = base; mutex_unlock(&pmc->powergates_lock); + err = of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev); + if (err < 0) + dev_err(&pdev->dev, + "Failed to register PMC Sub module driver: %d\n", err); + return 0; }