From patchwork Wed Mar 30 14:29:47 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laxman Dewangan X-Patchwork-Id: 603389 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3qZr1q5w7Bz9snm for ; Thu, 31 Mar 2016 01:41:35 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754089AbcC3Oku (ORCPT ); Wed, 30 Mar 2016 10:40:50 -0400 Received: from hqemgate14.nvidia.com ([216.228.121.143]:19040 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754054AbcC3Oku (ORCPT ); Wed, 30 Mar 2016 10:40:50 -0400 Received: from hqnvupgp07.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com id ; Wed, 30 Mar 2016 07:40:26 -0700 Received: from hqemhub02.nvidia.com ([172.20.150.31]) by hqnvupgp07.nvidia.com (PGP Universal service); Wed, 30 Mar 2016 07:39:03 -0700 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Wed, 30 Mar 2016 07:39:03 -0700 Received: from ldewanganubuntu-System-Product-Name.nvidia.com (172.20.144.16) by hqemhub02.nvidia.com (172.20.150.31) with Microsoft SMTP Server (TLS) id 8.3.406.0; Wed, 30 Mar 2016 07:40:48 -0700 From: Laxman Dewangan To: , , CC: , , , , , , , , Laxman Dewangan Subject: [PATCH V10 5/6] gpio: add DT binding doc for gpio of PMIC max77620/max20024 Date: Wed, 30 Mar 2016 19:59:47 +0530 Message-ID: <1459348188-11726-6-git-send-email-ldewangan@nvidia.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1459348188-11726-1-git-send-email-ldewangan@nvidia.com> References: <1459348188-11726-1-git-send-email-ldewangan@nvidia.com> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Maxim Semiconductor's PMIC MAX77620/MAX20024 has 8 GPIO pins which act as GPIO as well as special function mode. Add DT binding document to support these pins in GPIO mode via GPIO framework. Signed-off-by: Laxman Dewangan Acked-by: Rob Herring Acked-by: Linus Walleij --- Changes from V4: - Separate out from gpio driver Changes from V5/V6/V7: - None Changes from V8: - Collected Linus ack. Changes from V9: None .../devicetree/bindings/gpio/gpio-max77620.txt | 25 ++++++++++++++++++++++ 1 file changed, 25 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/gpio-max77620.txt diff --git a/Documentation/devicetree/bindings/gpio/gpio-max77620.txt b/Documentation/devicetree/bindings/gpio/gpio-max77620.txt new file mode 100644 index 0000000..410e716 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/gpio-max77620.txt @@ -0,0 +1,25 @@ +GPIO driver for MAX77620 Power management IC from Maxim Semiconductor. + +Device has 8 GPIO pins which can be configured as GPIO as well as the +special IO functions. + +Required properties: +------------------- +- gpio-controller : Marks the device node as a gpio controller. +- #gpio-cells : Should be two. The first cell is the pin number and + the second cell is used to specify the gpio polarity: + 0 = active high + 1 = active low +For more details, please refer generic GPIO DT binding document +. + +Example: +-------- +#include +... +max77620@3c { + compatible = "maxim,max77620"; + + gpio-controller; + #gpio-cells = <2>; +};