| Message ID | 1449578711-6141-3-git-send-email-mcoquelin.stm32@gmail.com |
|---|---|
| State | New |
| Headers | show |
On Tue, Dec 08, 2015 at 01:45:04PM +0100, Maxime Coquelin wrote: > Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> > --- > .../bindings/pinctrl/st,stm32-pinctrl.txt | 126 +++++++++++++++++++++ > 1 file changed, 126 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt > > diff --git a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt > new file mode 100644 > index 0000000..7b4800c > --- /dev/null > +++ b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt > @@ -0,0 +1,126 @@ > +* STM32 GPIO and Pin Mux/Config controller > + > +STMicroelectronics's STM32 MCUs intregrate a GPIO and Pin mux/config hardware > +controller. It controls the input/output settings on the available pins and > +also provides ability to multiplex and configure the output of various on-chip > +controllers onto these pads. > + > +Pin controller node: > +Required properies: > + - compatible: value should be one of the following: > + (a) "st,stm32f429-pinctrl" > + - #address-cells: The value of this property must be 1 > + - #size-cells : The value of this property must be 1 > + - ranges : defines mapping between pin controller node (parent) to > + gpio-bank node (children). > + - pins-are-numbered: Specify the subnodes are using numbered pinmux to > + specify pins. > + > +GPIO controller/bank node: > +Required properties: > + - gpio-controller : Indicates this device is a GPIO controller > + - #gpio-cells : Should be two. > + The first cell is the pin number > + The second one is the polarity: > + - 0 for active high > + - 1 for active low > + - reg : The gpio address range, relative to the pinctrl range > + - clocks : clock that drives this bank > + - st,bank-name : Should be a name string for this bank as specified in > + the datasheet How do you intend to use this? We should come up with something generic or drop it. Rob -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi Rob, 2015-12-09 4:41 GMT+01:00 Rob Herring <robh@kernel.org>: > On Tue, Dec 08, 2015 at 01:45:04PM +0100, Maxime Coquelin wrote: >> Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> >> --- >> .../bindings/pinctrl/st,stm32-pinctrl.txt | 126 +++++++++++++++++++++ >> 1 file changed, 126 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt >> >> diff --git a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt >> new file mode 100644 >> index 0000000..7b4800c >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt >> @@ -0,0 +1,126 @@ >> +* STM32 GPIO and Pin Mux/Config controller >> + >> +STMicroelectronics's STM32 MCUs intregrate a GPIO and Pin mux/config hardware >> +controller. It controls the input/output settings on the available pins and >> +also provides ability to multiplex and configure the output of various on-chip >> +controllers onto these pads. >> + >> +Pin controller node: >> +Required properies: >> + - compatible: value should be one of the following: >> + (a) "st,stm32f429-pinctrl" >> + - #address-cells: The value of this property must be 1 >> + - #size-cells : The value of this property must be 1 >> + - ranges : defines mapping between pin controller node (parent) to >> + gpio-bank node (children). >> + - pins-are-numbered: Specify the subnodes are using numbered pinmux to >> + specify pins. >> + >> +GPIO controller/bank node: >> +Required properties: >> + - gpio-controller : Indicates this device is a GPIO controller >> + - #gpio-cells : Should be two. >> + The first cell is the pin number >> + The second one is the polarity: >> + - 0 for active high >> + - 1 for active low >> + - reg : The gpio address range, relative to the pinctrl range >> + - clocks : clock that drives this bank >> + - st,bank-name : Should be a name string for this bank as specified in >> + the datasheet > > How do you intend to use this? We should come up with something generic > or drop it. Good point. It is used to have a meaningful name set in gpio_chip's label. I see two alternatives: 1. replace "st,bank-name" with label 2. use aliases, and construct label in driver with something like: kasprintf(GFP_KERNEL, "GPIO%c", 'A' + of_alias_get_id(np, "gpio")); What do you prefer? Do you have other ideas? Thanks, Maxime -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Wed, Dec 9, 2015 at 3:37 AM, Maxime Coquelin <mcoquelin.stm32@gmail.com> wrote: > Hi Rob, > > 2015-12-09 4:41 GMT+01:00 Rob Herring <robh@kernel.org>: >> On Tue, Dec 08, 2015 at 01:45:04PM +0100, Maxime Coquelin wrote: >>> Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> >>> --- >>> .../bindings/pinctrl/st,stm32-pinctrl.txt | 126 +++++++++++++++++++++ >>> 1 file changed, 126 insertions(+) >>> create mode 100644 Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt >>> >>> diff --git a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt >>> new file mode 100644 >>> index 0000000..7b4800c >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt >>> @@ -0,0 +1,126 @@ >>> +* STM32 GPIO and Pin Mux/Config controller >>> + >>> +STMicroelectronics's STM32 MCUs intregrate a GPIO and Pin mux/config hardware >>> +controller. It controls the input/output settings on the available pins and >>> +also provides ability to multiplex and configure the output of various on-chip >>> +controllers onto these pads. >>> + >>> +Pin controller node: >>> +Required properies: >>> + - compatible: value should be one of the following: >>> + (a) "st,stm32f429-pinctrl" >>> + - #address-cells: The value of this property must be 1 >>> + - #size-cells : The value of this property must be 1 >>> + - ranges : defines mapping between pin controller node (parent) to >>> + gpio-bank node (children). >>> + - pins-are-numbered: Specify the subnodes are using numbered pinmux to >>> + specify pins. >>> + >>> +GPIO controller/bank node: >>> +Required properties: >>> + - gpio-controller : Indicates this device is a GPIO controller >>> + - #gpio-cells : Should be two. >>> + The first cell is the pin number >>> + The second one is the polarity: >>> + - 0 for active high >>> + - 1 for active low >>> + - reg : The gpio address range, relative to the pinctrl range >>> + - clocks : clock that drives this bank >>> + - st,bank-name : Should be a name string for this bank as specified in >>> + the datasheet >> >> How do you intend to use this? We should come up with something generic >> or drop it. > Good point. > It is used to have a meaningful name set in gpio_chip's label. Who cares about the gpio_chip name? > I see two alternatives: > 1. replace "st,bank-name" with label > 2. use aliases, and construct label in driver with something like: > kasprintf(GFP_KERNEL, "GPIO%c", 'A' + of_alias_get_id(np, "gpio")); > > What do you prefer? I prefer to not need it. Of these 2 though, probably using label. However, I'm not convinced to say yes, we should use that because it will only encourage others to do the same. > Do you have other ideas? We do need names on individual lines though. I'd rather not complicate things by having labels for both unless we can define the need for it. Rob -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt new file mode 100644 index 0000000..7b4800c --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt @@ -0,0 +1,126 @@ +* STM32 GPIO and Pin Mux/Config controller + +STMicroelectronics's STM32 MCUs intregrate a GPIO and Pin mux/config hardware +controller. It controls the input/output settings on the available pins and +also provides ability to multiplex and configure the output of various on-chip +controllers onto these pads. + +Pin controller node: +Required properies: + - compatible: value should be one of the following: + (a) "st,stm32f429-pinctrl" + - #address-cells: The value of this property must be 1 + - #size-cells : The value of this property must be 1 + - ranges : defines mapping between pin controller node (parent) to + gpio-bank node (children). + - pins-are-numbered: Specify the subnodes are using numbered pinmux to + specify pins. + +GPIO controller/bank node: +Required properties: + - gpio-controller : Indicates this device is a GPIO controller + - #gpio-cells : Should be two. + The first cell is the pin number + The second one is the polarity: + - 0 for active high + - 1 for active low + - reg : The gpio address range, relative to the pinctrl range + - clocks : clock that drives this bank + - st,bank-name : Should be a name string for this bank as specified in + the datasheet + +Optional properties: + - reset: : Reference to the reset controller + +Example: +#include <dt-bindings/pinctrl/stm32f429-pinfunc.h> +... + + pin-controller { + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,stm32f429-pinctrl"; + ranges = <0 0x40020000 0x3000>; + pins-are-numbered; + + gpioa: gpio@40020000 { + gpio-controller; + #gpio-cells = <2>; + reg = <0x0 0x400>; + resets = <&reset_ahb1 0>; + st,bank-name = "GPIOA"; + }; + ... + pin-functions nodes follow... + }; + +Contents of function subnode node: +---------------------------------- +Subnode format +A pinctrl node should contain at least one subnode representing the +pinctrl group available on the machine. Each subnode will list the +pins it needs, and how they should be configured, with regard to muxer +configuration, pullups, drive, output high/low and output speed. + + node { + pinmux = <PIN_NUMBER_PINMUX>; + GENERIC_PINCONFIG; + }; + +Required properties: +- pinmux: integer array, represents gpio pin number and mux setting. + Supported pin number and mux varies for different SoCs, and are defined in + dt-bindings/pinctrl/<soc>-pinfunc.h directly. + These defines are calculated as: + ((port * 16 + line) << 8) | function + With: + - port: The gpio port index (PA = 0, PB = 1, ..., PK = 11) + - line: The line offset within the port (PA0 = 0, PA1 = 1, ..., PA15 = 15) + - function: The function number, can be: + * 0 : GPIO + * 1 : Alternate Function 0 + * 2 : Alternate Function 1 + * 3 : Alternate Function 2 + * ... + * 16 : Alternate Function 15 + * 17 : Analog + +Optional properties: +- GENERIC_PINCONFIG: is the generic pinconfig options to use. + Available options are: + - bias-disable, + - bias-pull-down, + - bias-pull-up, + - drive-push-pull, + - drive-open-drain, + - output-low + - output-high + - slew-rate = <x>, with x being: + < 0 > : Low speed + < 1 > : Medium speed + < 2 > : Fast speed + < 3 > : High speed + +Example: + +pin-controller { +... + usart1_pins_a: usart1@0 { + pins1 { + pinmux = <STM32F429_PA9_FUNC_USART1_TX>; + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = <STM32F429_PA10_FUNC_USART1_RX>; + bias-disable; + }; + }; +}; + +&usart1 { + pinctrl-0 = <&usart1_pins_a>; + pinctrl-names = "default"; + status = "okay"; +};
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> --- .../bindings/pinctrl/st,stm32-pinctrl.txt | 126 +++++++++++++++++++++ 1 file changed, 126 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt