From patchwork Tue Jun 9 23:24:17 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Hutchings X-Patchwork-Id: 482403 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 33236140758 for ; Wed, 10 Jun 2015 09:24:23 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754004AbbFIXYW (ORCPT ); Tue, 9 Jun 2015 19:24:22 -0400 Received: from ducie-dc1.codethink.co.uk ([185.25.241.215]:34406 "EHLO ducie-dc1.codethink.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753351AbbFIXYV (ORCPT ); Tue, 9 Jun 2015 19:24:21 -0400 Received: from localhost (localhost [127.0.0.1]) by ducie-dc1.codethink.co.uk (Postfix) with ESMTP id 10755461690; Wed, 10 Jun 2015 00:24:20 +0100 (BST) X-Virus-Scanned: Debian amavisd-new at ducie-dc1.codethink.co.uk Received: from ducie-dc1.codethink.co.uk ([127.0.0.1]) by localhost (ducie-dc1.codethink.co.uk [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 8L4deZYeCbnL; Wed, 10 Jun 2015 00:24:17 +0100 (BST) Received: from xylophone (shadbolt.e.decadent.org.uk [88.96.1.126]) by ducie-dc1.codethink.co.uk (Postfix) with ESMTPSA id 8C200460875; Wed, 10 Jun 2015 00:24:17 +0100 (BST) Message-ID: <1433892257.12074.54.camel@codethink.co.uk> Subject: [PATCH v2 5/6] ARM: shmobile: lager: Set clock rates for SDHI From: Ben Hutchings To: Ian Molton , linux-mmc@vger.kernel.org Cc: linux-sh@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@lists.codethink.co.uk, Sergei Shtylyov , Simon Horman , Kuninori Morimoto Date: Wed, 10 Jun 2015 00:24:17 +0100 In-Reply-To: <1433892104.12074.49.camel@codethink.co.uk> References: <1433892104.12074.49.camel@codethink.co.uk> Organization: Codethink Ltd. X-Mailer: Evolution 3.12.9-1+b1 Mime-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Ian Molton Set the input clocks to the highest supported speeds. Signed-off-by: Ben Hutchings --- arch/arm/boot/dts/r8a7790-lager.dts | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts index aaa4f258e279..5f68e53c58ae 100644 --- a/arch/arm/boot/dts/r8a7790-lager.dts +++ b/arch/arm/boot/dts/r8a7790-lager.dts @@ -488,6 +488,9 @@ pinctrl-0 = <&sdhi0_pins>; pinctrl-names = "default"; + assigned-clocks = <&mstp3_clks R8A7790_CLK_SDHI0>; + assigned-clock-rates = <156000000>; + vmmc-supply = <&vcc_sdhi0>; vqmmc-supply = <&vccq_sdhi0>; cd-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>; @@ -498,6 +501,9 @@ pinctrl-0 = <&sdhi2_pins>; pinctrl-names = "default"; + assigned-clocks = <&mstp3_clks R8A7790_CLK_SDHI2>; + assigned-clock-rates = <97500000>; + vmmc-supply = <&vcc_sdhi2>; vqmmc-supply = <&vccq_sdhi2>; cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;