From patchwork Mon May 25 20:39:51 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Blumenstingl X-Patchwork-Id: 476298 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 41E1D14016A for ; Tue, 26 May 2015 06:47:18 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=googlemail.com header.i=@googlemail.com header.b=Ekx2KXPD; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750837AbbEYUrR (ORCPT ); Mon, 25 May 2015 16:47:17 -0400 Received: from mail-wi0-f172.google.com ([209.85.212.172]:33180 "EHLO mail-wi0-f172.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751135AbbEYUrR (ORCPT ); Mon, 25 May 2015 16:47:17 -0400 Received: by wicmx19 with SMTP id mx19so48295609wic.0 for ; Mon, 25 May 2015 13:47:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ntasx1BjHqxB25R3nUdPHntCAwzvRLu44a2TXbUZPsU=; b=Ekx2KXPDdAmL+WHNILvlQ4E2+hyLwxynmoxi0IoffDYzizbE7PdCd6deRyYztiHOts 1+s1uS3CsLr3NgD45UBdTMtSOkbIs+rJ10M3xpysJ0K2afSzGHlI905nnOpSBbYgYGwN lkWBmiZiNL+OGb2HpZlXceZIL/h6MyWSkeCi7mkWaW3txgwJpatrHjlNxX8xxo6jpQlF T8ixJIEblQzhYaBx4zh8Il56utMfCBhBq0K9imvkj0DirOLZJgkHxJiqauial5aZuKXJ NGfXP6Zo+ybIP4PSab0kJYSMaqwv2/ta5eW7OOO44quhomNbXsuaU/terOj0FEDTqq5v eGiA== X-Received: by 10.180.82.135 with SMTP id i7mr35286028wiy.68.1432586835960; Mon, 25 May 2015 13:47:15 -0700 (PDT) Received: from blackbox.darklights.net (p54AF5EBF.dip0.t-ipconnect.de. [84.175.94.191]) by mx.google.com with ESMTPSA id ch2sm13555837wib.18.2015.05.25.13.47.12 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 25 May 2015 13:47:13 -0700 (PDT) From: Martin Blumenstingl To: linux-gpio@vger.kernel.org Cc: Linus Walleij , Alexandre Courbot , Grant Likely , John Crispin , Martin Blumenstingl Subject: [PATCH 2/2] gpio-stp-xway: Use the of_property_read_u32 helper Date: Mon, 25 May 2015 22:39:51 +0200 Message-Id: <1432586391-27634-2-git-send-email-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.4.1 In-Reply-To: <1432586391-27634-1-git-send-email-martin.blumenstingl@googlemail.com> References: <1432586391-27634-1-git-send-email-martin.blumenstingl@googlemail.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org This removes some redundant code but does have any functional impact. Signed-off-by: Martin Blumenstingl --- drivers/gpio/gpio-stp-xway.c | 27 +++++++++++---------------- 1 file changed, 11 insertions(+), 16 deletions(-) diff --git a/drivers/gpio/gpio-stp-xway.c b/drivers/gpio/gpio-stp-xway.c index 6d4148f..81bdbe7 100644 --- a/drivers/gpio/gpio-stp-xway.c +++ b/drivers/gpio/gpio-stp-xway.c @@ -200,7 +200,7 @@ static int xway_stp_hw_init(struct xway_stp *chip) static int xway_stp_probe(struct platform_device *pdev) { struct resource *res; - const __be32 *shadow, *groups, *dsl, *phy; + u32 shadow, groups, dsl, phy; struct xway_stp *chip; struct clk *clk; int ret = 0; @@ -223,33 +223,28 @@ static int xway_stp_probe(struct platform_device *pdev) chip->gc.owner = THIS_MODULE; /* store the shadow value if one was passed by the devicetree */ - shadow = of_get_property(pdev->dev.of_node, "lantiq,shadow", NULL); - if (shadow) - chip->shadow = be32_to_cpu(*shadow); + if (!of_property_read_u32(pdev->dev.of_node, "lantiq,shadow", &shadow)) + chip->shadow = shadow; /* find out which gpio groups should be enabled */ - groups = of_get_property(pdev->dev.of_node, "lantiq,groups", NULL); - if (groups) - chip->groups = be32_to_cpu(*groups) & XWAY_STP_GROUP_MASK; + if (!of_property_read_u32(pdev->dev.of_node, "lantiq,groups", &groups)) + chip->groups = groups & XWAY_STP_GROUP_MASK; else chip->groups = XWAY_STP_GROUP0; chip->gc.ngpio = fls(chip->groups) * 8; /* find out which gpios are controlled by the dsl core */ - dsl = of_get_property(pdev->dev.of_node, "lantiq,dsl", NULL); - if (dsl) - chip->dsl = be32_to_cpu(*dsl) & XWAY_STP_ADSL_MASK; + if (!of_property_read_u32(pdev->dev.of_node, "lantiq,dsl", &dsl)) + chip->dsl = dsl & XWAY_STP_ADSL_MASK; /* find out which gpios are controlled by the phys */ if (of_machine_is_compatible("lantiq,ar9") || of_machine_is_compatible("lantiq,gr9") || of_machine_is_compatible("lantiq,vr9")) { - phy = of_get_property(pdev->dev.of_node, "lantiq,phy1", NULL); - if (phy) - chip->phy1 = be32_to_cpu(*phy) & XWAY_STP_PHY_MASK; - phy = of_get_property(pdev->dev.of_node, "lantiq,phy2", NULL); - if (phy) - chip->phy2 = be32_to_cpu(*phy) & XWAY_STP_PHY_MASK; + if (!of_property_read_u32(pdev->dev.of_node, "lantiq,phy1", &phy)) + chip->phy1 = phy & XWAY_STP_PHY_MASK; + if (!of_property_read_u32(pdev->dev.of_node, "lantiq,phy2", &phy)) + chip->phy2 = phy & XWAY_STP_PHY_MASK; } /* check which edge trigger we should use, default to a falling edge */