From patchwork Wed May 20 08:42:30 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 474236 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 5D53D140281 for ; Wed, 20 May 2015 18:46:54 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751967AbbETIqf (ORCPT ); Wed, 20 May 2015 04:46:35 -0400 Received: from condef005-v.nifty.com ([210.131.4.242]:35511 "EHLO condef005-v.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752578AbbETIq2 (ORCPT ); Wed, 20 May 2015 04:46:28 -0400 Received: from conuserg012-v.nifty.com ([10.16.229.199])by condef005-v.nifty.com with ESMTP id t4K8hdMX009387 for ; Wed, 20 May 2015 17:43:39 +0900 Received: from beagle.diag.org (KD106139063102.au-net.ne.jp [106.139.63.102]) (authenticated) by conuserg012-v.nifty.com with ESMTP id t4K8gJQC000882; Wed, 20 May 2015 17:42:24 +0900 X-Nifty-SrcIP: [106.139.63.102] From: Masahiro Yamada To: linux-gpio@vger.kernel.org Cc: Masahiro Yamada , =?UTF-8?q?S=C3=B6ren=20Brinkmann?= , Michal Simek , Linus Walleij , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [RESEND PATCH 1/2] pinctrl: zynq: fix DEFINE_ZYNQ_PINMUX_FUNCTION_MUX macro Date: Wed, 20 May 2015 17:42:30 +0900 Message-Id: <1432111351-21336-2-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1432111351-21336-1-git-send-email-yamada.masahiro@socionext.com> References: <1432111351-21336-1-git-send-email-yamada.masahiro@socionext.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The offset to the mux register is missing. Signed-off-by: Masahiro Yamada --- drivers/pinctrl/pinctrl-zynq.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/pinctrl-zynq.c b/drivers/pinctrl/pinctrl-zynq.c index 3d5453a..77c5a98 100644 --- a/drivers/pinctrl/pinctrl-zynq.c +++ b/drivers/pinctrl/pinctrl-zynq.c @@ -714,12 +714,13 @@ static const char * const gpio0_groups[] = {"gpio0_0_grp", .mux_val = mval, \ } -#define DEFINE_ZYNQ_PINMUX_FUNCTION_MUX(fname, mval, mux, mask, shift) \ +#define DEFINE_ZYNQ_PINMUX_FUNCTION_MUX(fname, mval, offset, mask, shift)\ [ZYNQ_PMUX_##fname] = { \ .name = #fname, \ .groups = fname##_groups, \ .ngroups = ARRAY_SIZE(fname##_groups), \ .mux_val = mval, \ + .mux = offset, \ .mux_mask = mask, \ .mux_shift = shift, \ }