From patchwork Wed Apr 8 12:31:57 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 459234 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 0414E1401AD for ; Wed, 8 Apr 2015 22:32:05 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753428AbbDHMcE (ORCPT ); Wed, 8 Apr 2015 08:32:04 -0400 Received: from mail-la0-f41.google.com ([209.85.215.41]:33224 "EHLO mail-la0-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751265AbbDHMcD (ORCPT ); Wed, 8 Apr 2015 08:32:03 -0400 Received: by layy10 with SMTP id y10so64702935lay.0 for ; Wed, 08 Apr 2015 05:32:01 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=GiWA5/TGP5SIM+wy/KbuUyZujgndtvPTRoAZYdy+1mk=; b=fjVJ2wqovkAo41KXbE09HZSxDc6aj/5VeIny+1XCsim/y6PHIBiBehZJMd2U0J7gGg toiSWnfDNAKoKKhEhiK2iy9PWdILps+uZtDB5y2SAqbL+YFrpL8J3u8jIllX5yT7kqSK ps/3sMO4NIBUM4o9ccd4Tjee8PzQHiiMWknownA4SrbgTqGGR/UdKrt/B/08UaFXAmKD 7ybkzNWPH/Y3U7NhgNZb+CMrnHLbU+YVkhhYttyRYDh3LMT4u07Qgebh9tpH9GlFfPmT JTfUUG275XJZVWYrFc2dsWyNXiSPkzaBH1CodkuQ/NqpY2GiVEGotgMpjdLDx7kyENAw KNdw== X-Gm-Message-State: ALoCoQkrdyx6u++XxXAHF0Kqlz3kVoXZAI+KsHsQYAjG+t690HxoPJawaTzDcM1oZ6NOLvy/eo47 X-Received: by 10.112.151.211 with SMTP id us19mr22435533lbb.120.1428496321271; Wed, 08 Apr 2015 05:32:01 -0700 (PDT) Received: from localhost.localdomain ([85.235.11.236]) by mx.google.com with ESMTPSA id o7sm144062lbp.37.2015.04.08.05.31.59 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 08 Apr 2015 05:32:00 -0700 (PDT) From: Linus Walleij To: linux-gpio@vger.kernel.org Cc: Alexandre Courbot , Linus Walleij Subject: [PATCH] gpio: arrange PCI GPIO controllers alphabetically Date: Wed, 8 Apr 2015 14:31:57 +0200 Message-Id: <1428496317-19852-1-git-send-email-linus.walleij@linaro.org> X-Mailer: git-send-email 1.9.3 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Rearrange PCI GPIO controllers in alphabetic order as already indicated by the comment in the file. Signed-off-by: Linus Walleij --- drivers/gpio/Kconfig | 64 ++++++++++++++++++++++++++-------------------------- 1 file changed, 32 insertions(+), 32 deletions(-) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 38fd1311b9d6..c9e4c5dfd7c3 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -766,15 +766,17 @@ config GPIO_WM8994 comment "PCI GPIO expanders:" -config GPIO_CS5535 - tristate "AMD CS5535/CS5536 GPIO support" - depends on MFD_CS5535 +config GPIO_AMD8111 + tristate "AMD 8111 GPIO driver" + depends on PCI help - The AMD CS5535 and CS5536 southbridges support 28 GPIO pins that - can be used for quite a number of things. The CS5535/6 is found on - AMD Geode and Lemote Yeeloong devices. + The AMD 8111 south bridge contains 32 GPIO pins which can be used. - If unsure, say N. + Note, that usually system firmware/ACPI handles GPIO pins on their + own and users might easily break their systems with uncarefull usage + of this driver! + + If unsure, say N config GPIO_BT8XX tristate "BT8XX GPIO abuser" @@ -792,17 +794,15 @@ config GPIO_BT8XX If unsure, say N. -config GPIO_AMD8111 - tristate "AMD 8111 GPIO driver" - depends on PCI +config GPIO_CS5535 + tristate "AMD CS5535/CS5536 GPIO support" + depends on MFD_CS5535 help - The AMD 8111 south bridge contains 32 GPIO pins which can be used. - - Note, that usually system firmware/ACPI handles GPIO pins on their - own and users might easily break their systems with uncarefull usage - of this driver! + The AMD CS5535 and CS5536 southbridges support 28 GPIO pins that + can be used for quite a number of things. The CS5535/6 is found on + AMD Geode and Lemote Yeeloong devices. - If unsure, say N + If unsure, say N. config GPIO_INTEL_MID bool "Intel Mid GPIO support" @@ -811,6 +811,16 @@ config GPIO_INTEL_MID help Say Y here to support Intel Mid GPIO. +config GPIO_ML_IOH + tristate "OKI SEMICONDUCTOR ML7213 IOH GPIO support" + depends on PCI + select GENERIC_IRQ_CHIP + help + ML7213 is companion chip for Intel Atom E6xx series. + This driver can be used for OKI SEMICONDUCTOR ML7213 IOH(Input/Output + Hub) which is for IVI(In-Vehicle Infotainment) use. + This driver can access the IOH's GPIO device. + config GPIO_PCH tristate "Intel EG20T PCH/LAPIS Semiconductor IOH(ML7223/ML7831) GPIO" depends on PCI && (X86_32 || COMPILE_TEST) @@ -827,15 +837,14 @@ config GPIO_PCH ML7223/ML7831 is companion chip for Intel Atom E6xx series. ML7223/ML7831 is completely compatible for Intel EG20T PCH. -config GPIO_ML_IOH - tristate "OKI SEMICONDUCTOR ML7213 IOH GPIO support" +config GPIO_RDC321X + tristate "RDC R-321x GPIO support" depends on PCI - select GENERIC_IRQ_CHIP + select MFD_CORE + select MFD_RDC321X help - ML7213 is companion chip for Intel Atom E6xx series. - This driver can be used for OKI SEMICONDUCTOR ML7213 IOH(Input/Output - Hub) which is for IVI(In-Vehicle Infotainment) use. - This driver can access the IOH's GPIO device. + Support for the RDC R321x SoC GPIOs over southbridge + PCI configuration space. config GPIO_SODAVILLE bool "Intel Sodaville GPIO support" @@ -851,15 +860,6 @@ config GPIO_TIMBERDALE ---help--- Add support for the GPIO IP in the timberdale FPGA. -config GPIO_RDC321X - tristate "RDC R-321x GPIO support" - depends on PCI - select MFD_CORE - select MFD_RDC321X - help - Support for the RDC R321x SoC GPIOs over southbridge - PCI configuration space. - comment "SPI GPIO expanders:" config GPIO_MAX7301