From patchwork Tue Mar 31 16:24:48 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Coquelin X-Patchwork-Id: 456674 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id E269D1401AC for ; Wed, 1 Apr 2015 03:27:15 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="verification failed; unprotected key" header.d=gmail.com header.i=@gmail.com header.b=TGy8sx1E; dkim-adsp=none (unprotected policy); dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754014AbbCaQ1L (ORCPT ); Tue, 31 Mar 2015 12:27:11 -0400 Received: from mail-wg0-f54.google.com ([74.125.82.54]:35378 "EHLO mail-wg0-f54.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753816AbbCaQ1A (ORCPT ); Tue, 31 Mar 2015 12:27:00 -0400 Received: by wgdm6 with SMTP id m6so25345195wgd.2; Tue, 31 Mar 2015 09:26:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=eKG+PLDaSgfFw/VD5Fm9pjyRsE2a7eZkxyZA2XyLO/E=; b=TGy8sx1ExEIMn0wn8m4zo2vwMRo+VC3BcJRXmlTwiuKnfF4oZYa1dfh9Oh6/HtDM39 0gERMwg6IK+xCWgmktRz+ypkh1WIB3gJqjCJ1c9QVIwcavXT3GbYQq0qS5qBrzM+N5pq ALvznveJR0m1m+/h4ue/Rio/fXSfH9eVdo+cazj26KnRrc/0cvsQw0hOikzgLbAVLrDW 7kfEYdqxB0kpkRPt9IWhhlnS/QXkDMDSbzXcBI6K9j1rIAVTq3VvLPbb4LcCThe3mDzY dbZjcUEM34j1DidckQjS8ZwKgIs76hLmd3ZXyvdT0xBSKzqQ7LMoMIs4eqNHXQTWDysg iVew== X-Received: by 10.194.200.8 with SMTP id jo8mr73387215wjc.64.1427819217446; Tue, 31 Mar 2015 09:26:57 -0700 (PDT) Received: from lmecul0520.lme.st.com (LPuteaux-656-1-48-212.w82-127.abo.wanadoo.fr. [82.127.83.212]) by mx.google.com with ESMTPSA id k1sm21028743wjn.9.2015.03.31.09.26.55 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 31 Mar 2015 09:26:56 -0700 (PDT) From: Maxime Coquelin To: u.kleine-koenig@pengutronix.de, afaerber@suse.de, geert@linux-m68k.org, Rob Herring , Philipp Zabel , Linus Walleij , Arnd Bergmann , stefan@agner.ch, pmeerw@pmeerw.net, pebolle@tiscali.nl, peter@hurleysoftware.com, andy.shevchenko@gmail.com, cw00.choi@samsung.com, Russell King , Daniel Lezcano Cc: Jonathan Corbet , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Thomas Gleixner , Greg Kroah-Hartman , Jiri Slaby , Andrew Morton , "David S. Miller" , Mauro Carvalho Chehab , Joe Perches , Antti Palosaari , Tejun Heo , Will Deacon , Nikolay Borisov , Rusty Russell , Kees Cook , Michal Marek , linux-doc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-serial@vger.kernel.org, linux-arch@vger.kernel.org, linux-api@vger.kernel.org, mcoquelin.stm32@gmail.com Subject: [PATCH v4 07/15] dt-bindings: Document the STM32 timer bindings Date: Tue, 31 Mar 2015 18:24:48 +0200 Message-Id: <1427819096-31109-8-git-send-email-mcoquelin.stm32@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1427819096-31109-1-git-send-email-mcoquelin.stm32@gmail.com> References: <1427819096-31109-1-git-send-email-mcoquelin.stm32@gmail.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org This adds documentation of device tree bindings for the STM32 timer. Tested-by: Chanwoo Choi Signed-off-by: Maxime Coquelin --- .../devicetree/bindings/timer/st,stm32-timer.txt | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 Documentation/devicetree/bindings/timer/st,stm32-timer.txt diff --git a/Documentation/devicetree/bindings/timer/st,stm32-timer.txt b/Documentation/devicetree/bindings/timer/st,stm32-timer.txt new file mode 100644 index 0000000..d3fdeb0 --- /dev/null +++ b/Documentation/devicetree/bindings/timer/st,stm32-timer.txt @@ -0,0 +1,22 @@ +. STMicroelectronics STM32 timer + +The STM32 MCUs family has several general-purpose 16 and 32 bits timers. + +Required properties: +- compatible : Should be st,stm32-timer" +- reg : Address and length of the register set +- clocks : Reference on the timer input clock +- interrupts : Reference to the timer interrupt + +Optional properties: +- resets: Reference to a reset controller asserting the timer + +Example: + +timer5: timer@40000c00 { + compatible = "st,stm32-timer"; + reg = <0x40000c00 0x400>; + interrupts = <50>; + resets = <&rrc 259>; + clocks = <&clk_pmtr1>; +};