From patchwork Wed Nov 26 14:24:16 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 415145 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 76DD1140172 for ; Thu, 27 Nov 2014 01:26:59 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752738AbaKZOYt (ORCPT ); Wed, 26 Nov 2014 09:24:49 -0500 Received: from mailout2.w1.samsung.com ([210.118.77.12]:44757 "EHLO mailout2.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752554AbaKZOYp (ORCPT ); Wed, 26 Nov 2014 09:24:45 -0500 Received: from eucpsbgm2.samsung.com (unknown [203.254.199.245]) by mailout2.w1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0NFN00CQEHHRXH70@mailout2.w1.samsung.com>; Wed, 26 Nov 2014 14:27:27 +0000 (GMT) X-AuditID: cbfec7f5-b7fc86d0000066b7-13-5475e2a94710 Received: from eusync2.samsung.com ( [203.254.199.212]) by eucpsbgm2.samsung.com (EUCPMTA) with SMTP id DD.C0.26295.9A2E5745; Wed, 26 Nov 2014 14:24:41 +0000 (GMT) Received: from AMDC1943.digital.local ([106.116.151.171]) by eusync2.samsung.com (Oracle Communications Messaging Server 7u4-23.01(7.0.4.23.0) 64bit (built Aug 10 2011)) with ESMTPA id <0NFN00GC9HCY5O30@eusync2.samsung.com>; Wed, 26 Nov 2014 14:24:40 +0000 (GMT) From: Krzysztof Kozlowski To: Sylwester Nawrocki , Tomasz Figa , Mike Turquette , Kukjin Kim , linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Thomas Abraham , Linus Walleij , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, Javier Martinez Canillas , Vivek Gautam , Kevin Hilman Cc: Russell King , Kyungmin Park , Marek Szyprowski , Bartlomiej Zolnierkiewicz , Krzysztof Kozlowski Subject: [PATCH v2 4/5] ARM: dts: exynos5420: Add clock for audss pinctrl Date: Wed, 26 Nov 2014 15:24:16 +0100 Message-id: <1417011857-10419-5-git-send-email-k.kozlowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1417011857-10419-1-git-send-email-k.kozlowski@samsung.com> References: <1417011857-10419-1-git-send-email-k.kozlowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrLLMWRmVeSWpSXmKPExsVy+t/xK7orH5WGGMxsYbfYOGM9q8X8I+dY LdquHGS3OPq7wOL1C0OL/sevmS2ebn7MZHG26Q27xZQ/y5ksNj2+xmqxef4fRovLu+awWcw4 v4/J4vZlXou1R+6yWzydcJHN4vCbdlaLYzOWMFqs2vWH0UHYo6W5h83j7/PrLB47Z91l99i0 qpPN4861PWwem5fUe/RtWcXo8XmTXABHFJdNSmpOZllqkb5dAlfGgWPX2AtOsVbsfTmVpYHx IksXIyeHhICJxNG+CUwQtpjEhXvr2UBsIYGljBL3b4d3MXIB2X1MEpua/rKCJNgEjCU2L1/C BpIQEVjBIrFr0S9mEIdZ4B2jxPoz68HGCgt4SryeOJEZxGYRUJVo29kO1MHBwSvgLrFuQwrE NjmJk8cmgw3lFPCQaHt/nhlis7vE932HGScw8i5gZFjFKJpamlxQnJSea6RXnJhbXJqXrpec n7uJERLkX3cwLj1mdYhRgINRiYf3RlxJiBBrYllxZe4hRgkOZiUR3tQ7pSFCvCmJlVWpRfnx RaU5qcWHGJk4OKUaGJU8/A+oTtf67aC1PuPGihnRMxqPTNu0LOLJr4NhOly1G9gFsziddr+9 9/4a5wSpvL3zfnIUX3ugrbtE7Gt9UXCufkreduuDdVXOdor/3/2sOfEx5pqV8bPjS5/MO/sq y4WnbtM/WU5Hk8BVV5W+vBdeXPcg0S9YP5ipUvjji7wwOw+fgimLjZRYijMSDbWYi4oTARo7 VddQAgAA Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The pinctrl for audio subsystem needs 'mau_epll' clock to be enabled in order to properly access memory during GPIO setup. Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos5420-pinctrl.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi index ba686e40eac7..c0ca0da36ade 100644 --- a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi @@ -696,6 +696,9 @@ }; pinctrl@03860000 { + clocks = <&clock CLK_MAU_EPLL>; + clock-names = "block"; + gpz: gpz { gpio-controller; #gpio-cells = <2>;