From patchwork Tue Oct 28 00:02:02 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 404017 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 24166140082 for ; Tue, 28 Oct 2014 11:02:53 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753094AbaJ1ACu (ORCPT ); Mon, 27 Oct 2014 20:02:50 -0400 Received: from mail-wg0-f47.google.com ([74.125.82.47]:42266 "EHLO mail-wg0-f47.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753066AbaJ1ACs (ORCPT ); Mon, 27 Oct 2014 20:02:48 -0400 Received: by mail-wg0-f47.google.com with SMTP id a1so3213458wgh.30 for ; Mon, 27 Oct 2014 17:02:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=OIrK1jrDNZ2W+g1BuAAlKuh0VxQdYAbmb5H6dTnGUtA=; b=L5d2Ej8zrJeHLA/5wbXjbmBWzv2wC2s0RecWNPWFpYydH5f9sFtVNxJf6iQjqIolgU ZCu7kBgChkBhW3KgsSD0QEF/h/rIQ9XocuyHfD6pvu5aydsdYPgXA5yYAaoZL/PUxVws nc0P1klxeFKoracr1kym+O+lyMQusSiD9vE4MR9HINDwg4BtsVonQRvXzlo4fwx7vC7M gifsPcY8zJaV2hcI5SZMq9If02fqbraqy8TuWql5ag1Z8Ziq8T8h+B96iLYkWjvvmVRT TedpKFvq6q027Rvl8M62lNMKA3Kw/gSY6qyXWnphKeS+L+N6v5DRZyTmplyyaleBjaIu jC2A== X-Received: by 10.180.95.74 with SMTP id di10mr6164172wib.54.1414454566641; Mon, 27 Oct 2014 17:02:46 -0700 (PDT) Received: from fangorn.rup.mentorg.com (nat-min.mentorg.com. [139.181.32.34]) by mx.google.com with ESMTPSA id fq1sm13495340wib.12.2014.10.27.17.02.44 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 27 Oct 2014 17:02:45 -0700 (PDT) From: Dmitry Eremin-Solenikov To: linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-input@vger.kernel.org, linux-leds@vger.kernel.org, linux-spi@vger.kernel.org, linux-fbdev@vger.kernel.org, alsa-devel@alsa-project.org Cc: Andrea Adami , Russell King , Daniel Mack , Haojian Zhuang , Robert Jarzmik , Linus Walleij , Alexandre Courbot , Dmitry Torokhov , Bryan Wu , Richard Purdie , Samuel Ortiz , Lee Jones , Mark Brown , Jingoo Han , Liam Girdwood Subject: [PATCH 09/15] ARM: sa1100: don't preallocate IRQ space for locomo Date: Tue, 28 Oct 2014 03:02:02 +0300 Message-Id: <1414454528-24240-10-git-send-email-dbaryshkov@gmail.com> X-Mailer: git-send-email 2.1.1 In-Reply-To: <1414454528-24240-1-git-send-email-dbaryshkov@gmail.com> References: <1414454528-24240-1-git-send-email-dbaryshkov@gmail.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org As new locomo driver properly supports SPARSE_IRQ, stop playing with NR_IRQS on sa1100 (locomo was the last chip requiring NR_IRQ tricks). Signed-off-by: Dmitry Eremin-Solenikov --- arch/arm/mach-sa1100/include/mach/irqs.h | 19 ++----------------- 1 file changed, 2 insertions(+), 17 deletions(-) diff --git a/arch/arm/mach-sa1100/include/mach/irqs.h b/arch/arm/mach-sa1100/include/mach/irqs.h index 3790298..99e7202 100644 --- a/arch/arm/mach-sa1100/include/mach/irqs.h +++ b/arch/arm/mach-sa1100/include/mach/irqs.h @@ -68,22 +68,7 @@ #define IRQ_BOARD_START 49 #define IRQ_BOARD_END 65 -/* - * Figure out the MAX IRQ number. - * - * Neponset, SA1111 and UCB1x00 are sparse IRQ aware, so can dynamically - * allocate their IRQs above NR_IRQS. - * - * LoCoMo has 4 additional IRQs, but is not sparse IRQ aware, and so has - * to be included in the NR_IRQS calculation. - */ -#ifdef CONFIG_SHARP_LOCOMO -#define NR_IRQS_LOCOMO 4 -#else -#define NR_IRQS_LOCOMO 0 -#endif - #ifndef NR_IRQS -#define NR_IRQS (IRQ_BOARD_START + NR_IRQS_LOCOMO) +#define NR_IRQS IRQ_BOARD_START #endif -#define SA1100_NR_IRQS (IRQ_BOARD_START + NR_IRQS_LOCOMO) +#define SA1100_NR_IRQS IRQ_BOARD_START