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([2a01:4262:1ab:c:5af0:999b:bb78:7614]) by smtp.gmail.com with ESMTPSA id eu18-20020a170907299200b00a26e53be089sm9549873ejc.44.2024.01.03.05.28.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Jan 2024 05:28:53 -0800 (PST) From: Emil Renner Berthing To: linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org Cc: Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jisheng Zhang , Guo Ren , Fu Wei , Paul Walmsley , Palmer Dabbelt , Drew Fustini Subject: [PATCH v2 0/8] Add T-Head TH1520 SoC pin control Date: Wed, 3 Jan 2024 14:28:37 +0100 Message-ID: <20240103132852.298964-1-emil.renner.berthing@canonical.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 This adds a pin control driver for the T-Head TH1520 RISC-V SoC used on the Lichee Pi 4A and BeagleV Ahead boards and updates the device trees to make use of it. It can be easily tested using my th1520 branch at https://github.com/esmil/linux.git ..which also adds the MMC, PWM, ethernet and USB drivers that have been posted but are not upstream yet. Jisheng: I've added this driver to the generic TH1520 entry in MAINTAINERS like you did with your USB driver. Let me know if that's not ok and I'll create a separate entry for this driver with me as maintainer. Drew: The last patch is purely based on reading the schematics. It'd be great if you could give it a spin on real hardware. Changes since v1 - Keep pinmux data for each pin so we can mux by type instead of directly using the mux index. Eg. use function = "uart" etc. (Linus) - Drop the strong pull-up property and prevent Linux from combining the strong pull-up with the regular pull up/down. This also means we can't report such usage if it set up by earlier stages, but that problem is deferred until we encounter it (Linus) - Reference pinmux-node.yaml properly (Rob) - Specify valid pin names for each group (Rob) - Enable bus clock (Emil) - Implement gpio_request_enable() and gpio_set_direction() for automatic GPIO handling (Emil) - Drop patch adding gpio-ranges to the gpio-dwapb bindings that is merged in gpio/for-next. (Emil) - Patch 6/8 adding GPIO line names for the Lichee Pi 4M module (Emil) - Various code nits (Andy) /Emil Emil Renner Berthing (8): dt-bindings: pinctrl: Add thead,th1520-pinctrl bindings pinctrl: Add driver for the T-Head TH1520 SoC riscv: dts: thead: Add TH1520 pin control nodes riscv: dts: thead: Add TH1520 GPIO ranges riscv: dts: thead: Adjust TH1520 GPIO labels riscv: dts: thead: Add Lichee Pi 4M GPIO line names riscv: dts: thead: Add TH1520 pinctrl settings for UART0 riscv: dtb: thead: Add BeagleV Ahead LEDs .../pinctrl/thead,th1520-pinctrl.yaml | 372 ++++++++ MAINTAINERS | 1 + .../boot/dts/thead/th1520-beaglev-ahead.dts | 87 ++ .../dts/thead/th1520-lichee-module-4a.dtsi | 43 + .../boot/dts/thead/th1520-lichee-pi-4a.dts | 28 + arch/riscv/boot/dts/thead/th1520.dtsi | 62 +- drivers/pinctrl/Kconfig | 9 + drivers/pinctrl/Makefile | 1 + drivers/pinctrl/pinctrl-th1520.c | 891 ++++++++++++++++++ 9 files changed, 1478 insertions(+), 16 deletions(-) create mode 100644 Documentation/devicetree/bindings/pinctrl/thead,th1520-pinctrl.yaml create mode 100644 drivers/pinctrl/pinctrl-th1520.c Tested-by: Thomas Bonnefille