From patchwork Mon Aug 5 10:16:04 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 1142107 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=bootlin.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 462DFG5ZMRz9sBF for ; Mon, 5 Aug 2019 20:16:18 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727328AbfHEKQR (ORCPT ); Mon, 5 Aug 2019 06:16:17 -0400 Received: from relay7-d.mail.gandi.net ([217.70.183.200]:58401 "EHLO relay7-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727259AbfHEKQR (ORCPT ); Mon, 5 Aug 2019 06:16:17 -0400 X-Originating-IP: 86.250.200.211 Received: from localhost.localdomain (lfbn-1-17395-211.w86-250.abo.wanadoo.fr [86.250.200.211]) (Authenticated sender: miquel.raynal@bootlin.com) by relay7-d.mail.gandi.net (Postfix) with ESMTPSA id B1F542000F; Mon, 5 Aug 2019 10:16:13 +0000 (UTC) From: Miquel Raynal To: Rob Herring , Mark Rutland Cc: , Thomas Petazzoni , Gregory Clement , Antoine Tenart , Maxime Chevallier , Nadav Haklai , Linus Walleij , linux-gpio@vger.kernel.org, , Grzegorz Jaszczyk , Marcin Wojtas , Stefan Chulski , Yan Markman , Miquel Raynal Subject: [PATCH 0/3] CP115 pinctrl support Date: Mon, 5 Aug 2019 12:16:04 +0200 Message-Id: <20190805101607.29811-1-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Hello, This is the second batch of changes (out of three) to support the brand new Marvell CN9130 SoCs which are made of one AP807 and one CP115. We add a new compatible (and the relevant support in the pinctrl driver) before the addition in batch 3/3 of CN9130 SoCs DT using it. 1st batch was clocks support and is independent from this one. Thanks, Miquèl Grzegorz Jaszczyk (2): dt-bindings: cp110: document the new CP115 pinctrl compatible pinctrl: mvebu: add additional variant for standalone CP115 Konstantin Porotchkin (1): pinctrl: mvebu: Add CP110 missing pin functionality .../arm/marvell/cp110-system-controller.txt | 4 ++-- drivers/pinctrl/mvebu/pinctrl-armada-cp110.c | 20 ++++++++++++++----- 2 files changed, 17 insertions(+), 7 deletions(-)