From patchwork Wed Sep 13 08:56:27 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 813229 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=nifty.com header.i=@nifty.com header.b="T/fOtuLN"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3xsbFt2CGzz9sPs for ; Wed, 13 Sep 2017 18:59:46 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752098AbdIMI6f (ORCPT ); Wed, 13 Sep 2017 04:58:35 -0400 Received: from conuserg-09.nifty.com ([210.131.2.76]:64497 "EHLO conuserg-09.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751925AbdIMI62 (ORCPT ); Wed, 13 Sep 2017 04:58:28 -0400 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-09.nifty.com with ESMTP id v8D8ugqi027391; Wed, 13 Sep 2017 17:56:43 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-09.nifty.com v8D8ugqi027391 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1505293003; bh=0gleN6X0k7nZi62fUybxfiSe2ZQxALSUiANuCJGR54E=; h=From:To:Cc:Subject:Date:From; b=T/fOtuLNPmLiso2bF2R6SEThDNDXusV1ykN9EdqZdG8W/nw1X2fIXkK7H4o/daC/3 vnhbzAtaMzlDv6PJAiCEXoY8jOzuSUr4O5aQlMwpmInc1CdAmuT5J4VAMWNnTMk4oR VmW1/LPSsXs7FaQ4ZjfLCudHteKhldpkhWKv+ABKnjR9WAUm9IVUQu/EX1xdTjUN4d l0TITLs8ViKK8qhEIf6/yQGBbJP7Hpf2B+zpF6Copb6KI0q7X67z9Qf4vZC43hK5Ro KItdGgnG3XxrqXbYfMmbD9s0hbZzNt0U8rsiNKLg/vNA8MeMwFlb98N49+9MvtCxql 09skOvIdkhtwg== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: Marc Zyngier , linux-gpio@vger.kernel.org Cc: Thomas Gleixner , Jason Cooper , Rob Herring , Linus Walleij , David Daney , Masami Hiramatsu , Jassi Brar , Masahiro Yamada , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Mark Rutland , linux-arm-kernel@lists.infradead.org Subject: [PATCH v5 0/3] gpio: uniphier: UniPhier GPIO driver Date: Wed, 13 Sep 2017 17:56:27 +0900 Message-Id: <1505292990-22957-1-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org This series adds UniPhier GPIO driver. The interrupt controller part is implemented by using hierarchy irqdomain. My problem is mapping of IRQ from this controller to the parent irqchip is not contiguous. IRQ line of GPIO ---> Parent interrupt 0 ---> 48 1 ---> 49 ... 15 ---> 63 16 ---> 154 17 ---> 155 ... 20 ---> 158 21 ---> 217 22 ---> 218 ... At first, I tried to hard-code parent irq numbers because it easily avoids the statically allocated IRQ resource problem. (https://lkml.org/lkml/2017/7/6/758) But, hard-coding interrupts made Linus Walleij unhappy. In v4, I tried to use the new API irq_domain_push_irq(). I needed to change it to make it work for DT, but seems controversial in the irqdomain subsystem review. In v5, I came up with another solution. The idea is simple. .alloc() hook can call of_irq_parse_one() to retrieve the irq information from DT property. If virq is already allocated, we can simply dispose it and re-alloc it in hierarchy domain manner. Changes in v5: - Split into a separate patch for DT binding - Add a new patch to export of_phandle_args_to_fwspec - Split DT binding into a separate file - v4 depends on some patches that change irq_domain_push_irq(), but they got negative feedback in the irqdomain subsystem review. Yet another approach here. Parse "interrupts" property in .alloc() hook. If the parent IRQ is already mapped, dispose it and re-alloc in irqdomain manner. Changes in v4: - Add COMPILE_TEST and select IRQ_DOMAIN_HIERARCHY - Reimplement irqchip part by using irq_domain_push_irq() Changes in v3: - Add .irq_set_affinity() hook - Use irq_domain_create_hierarchy() instead of legacy irq_domain_add_hierarchy() Changes in v2: - Remove +32 offset for parent interrupts to follow the GIC binding convention - Let uniphier_gpio_irq_alloc() fail if nr_irqs != 1 - Allocate gpio_chip statically because just one instance is supported - Fix suspend and resume hooks Masahiro Yamada (3): irqdomain: export of_phandle_args_to_fwspec dt-bindings: gpio: uniphier: add UniPhier GPIO binding gpio: uniphier: add UniPhier GPIO controller driver .../devicetree/bindings/gpio/gpio-uniphier.txt | 43 ++ MAINTAINERS | 1 + drivers/gpio/Kconfig | 8 + drivers/gpio/Makefile | 1 + drivers/gpio/gpio-uniphier.c | 504 +++++++++++++++++++++ include/dt-bindings/gpio/uniphier-gpio.h | 18 + include/linux/irqdomain.h | 2 + kernel/irq/irqdomain.c | 5 +- 8 files changed, 580 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/gpio/gpio-uniphier.txt create mode 100644 drivers/gpio/gpio-uniphier.c create mode 100644 include/dt-bindings/gpio/uniphier-gpio.h