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X-OriginatorOrg: wiwynn.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Aug 2024 09:42:01.5279 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ff17e67b-df52-4a86-2866-08dcc1c5827a X-MS-Exchange-CrossTenant-Id: da6e0628-fc83-4caf-9dd2-73061cbab167 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=da6e0628-fc83-4caf-9dd2-73061cbab167;Ip=[211.20.1.79];Helo=[localhost.localdomain] X-MS-Exchange-CrossTenant-AuthSource: SG2PEPF000B66CB.apcprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: TYZPR04MB5784 X-BeenThere: linux-aspeed@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux ASPEED SoC development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-aspeed@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, Delphine CC Chiu , linux-kernel@vger.kernel.org Errors-To: linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linux-aspeed" Enable interrupt setting for pca9555 Signed-off-by: Delphine CC Chiu --- .../aspeed/aspeed-bmc-facebook-yosemite4.dts | 56 +++++++++++++++++-- 1 file changed, 52 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts index b11951c2f71e..09bbbcb192f5 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts @@ -832,30 +832,78 @@ power-sensor@12 { gpio@20 { compatible = "nxp,pca9555"; - reg = <0x20>; + pinctrl-names = "default"; gpio-controller; #gpio-cells = <2>; + reg = <0x20>; + interrupt-parent = <&gpio0>; + interrupts = <98 IRQ_TYPE_LEVEL_LOW>; + gpio-line-names = + "P48V_OCP_GPIO1","P48V_OCP_GPIO2", + "P48V_OCP_GPIO3","FAN_BOARD_0_REVISION_0_R", + "FAN_BOARD_0_REVISION_1_R","FAN_BOARD_1_REVISION_0_R", + "FAN_BOARD_1_REVISION_1_R","RST_MUX_R_N", + "RST_LED_CONTROL_FAN_BOARD_0_N","RST_LED_CONTROL_FAN_BOARD_1_N", + "RST_IOEXP_FAN_BOARD_0_N","RST_IOEXP_FAN_BOARD_1_N", + "PWRGD_LOAD_SWITCH_FAN_BOARD_0_R","PWRGD_LOAD_SWITCH_FAN_BOARD_1_R", + "",""; }; gpio@21 { compatible = "nxp,pca9555"; - reg = <0x21>; + pinctrl-names = "default"; gpio-controller; #gpio-cells = <2>; + reg = <0x21>; + interrupt-parent = <&gpio0>; + interrupts = <98 IRQ_TYPE_LEVEL_LOW>; + gpio-line-names = + "HSC_OCP_SLOT_ODD_GPIO1","HSC_OCP_SLOT_ODD_GPIO2", + "HSC_OCP_SLOT_ODD_GPIO3","HSC_OCP_SLOT_EVEN_GPIO1", + "HSC_OCP_SLOT_EVEN_GPIO2","HSC_OCP_SLOT_EVEN_GPIO3", + "ADC_TYPE_0_R","ADC_TYPE_1_R", + "MEDUSA_BOARD_REV_0","MEDUSA_BOARD_REV_1", + "MEDUSA_BOARD_REV_2","MEDUSA_BOARD_TYPE", + "DELTA_MODULE_TYPE","P12V_HSC_TYPE", + "",""; }; gpio@22 { compatible = "nxp,pca9555"; - reg = <0x22>; + pinctrl-names = "default"; gpio-controller; #gpio-cells = <2>; + reg = <0x22>; + interrupt-parent = <&gpio0>; + interrupts = <98 IRQ_TYPE_LEVEL_LOW>; + gpio-line-names = + "CARD_TYPE_SLOT1","CARD_TYPE_SLOT2", + "CARD_TYPE_SLOT3","CARD_TYPE_SLOT4", + "CARD_TYPE_SLOT5","CARD_TYPE_SLOT6", + "CARD_TYPE_SLOT7","CARD_TYPE_SLOT8", + "OC_P48V_HSC_0_N","FLT_P48V_HSC_0_N", + "OC_P48V_HSC_1_N","FLT_P48V_HSC_1_N", + "EN_P48V_AUX_0","EN_P48V_AUX_1", + "PWRGD_P12V_AUX_0","PWRGD_P12V_AUX_1"; }; gpio@23 { compatible = "nxp,pca9555"; - reg = <0x23>; + pinctrl-names = "default"; gpio-controller; #gpio-cells = <2>; + reg = <0x23>; + interrupt-parent = <&gpio0>; + interrupts = <98 IRQ_TYPE_LEVEL_LOW>; + gpio-line-names = + "HSC1_ALERT1_R_N","HSC2_ALERT1_R_N", + "HSC3_ALERT1_R_N","HSC4_ALERT1_R_N", + "HSC5_ALERT1_R_N","HSC6_ALERT1_R_N", + "HSC7_ALERT1_R_N","HSC8_ALERT1_R_N", + "HSC1_ALERT2_R_N","HSC2_ALERT2_R_N", + "HSC3_ALERT2_R_N","HSC4_ALERT2_R_N", + "HSC5_ALERT2_R_N","HSC6_ALERT2_R_N", + "HSC7_ALERT2_R_N","HSC8_ALERT2_R_N"; }; temperature-sensor@48 {