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Thu, 22 Feb 2024 05:35:04 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1708540505; x=1740076505; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=4UcL4BkrrA48FaRG5BWoOyofknmODC7RJONPDVqFX3k=; b=RgeCDOlO353p59o8SPQt+igQIkANA64s7h/ttHCPTlXRxrPiDQv0kNB2 RakbV70vYQ6xGx5eRzsBenUwpqV+AYj6MrCan50lcJAQKEw9NCJ8ROwjY T248M9kQLUyLWFLhxVe7G1q8bwaXkDbZu1mG/oS8CGDMPy4Ut9/RpJm63 7yd/1+GJMtPmjcU3nSen5bj3E+t5OPNhBnNzGdJko/XX3IGBaolCeTmKR cbWWCXFPRaH9R03FKTrL0Z07QjZkGm3LOYRFSLIvagDWftuJF6QsBrHeE wKI4Hg8QpK/7dkTruJt/sXtZXr0TaDm8vq9qyrsaz3Qi6mYr1jPAYg8JL w==; X-IronPort-AV: E=McAfee;i="6600,9927,10991"; a="28164763" X-IronPort-AV: E=Sophos;i="6.06,176,1705392000"; d="scan'208";a="28164763" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Feb 2024 10:35:01 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10991"; a="936684750" X-IronPort-AV: E=Sophos;i="6.06,176,1705392000"; d="scan'208";a="936684750" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga001.fm.intel.com with ESMTP; 21 Feb 2024 10:34:55 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 1A0CF49C; Wed, 21 Feb 2024 20:34:47 +0200 (EET) From: Andy Shevchenko To: Greg Kroah-Hartman , Andy Shevchenko , Thomas Gleixner , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-rpi-kernel@lists.infradead.org, linux-mips@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v1 06/14] serial: 8250_bcm7271: Switch to use uart_read_port_properties() Date: Wed, 21 Feb 2024 20:31:22 +0200 Message-ID: <20240221183442.4124354-7-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1.gbec44491f096 In-Reply-To: <20240221183442.4124354-1-andriy.shevchenko@linux.intel.com> References: <20240221183442.4124354-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 X-BeenThere: linux-aspeed@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux ASPEED SoC development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Scott Branden , Florian Fainelli , Ray Jui , Al Cooper , Jonathan Hunter , Kunihiko Hayashi , Vladimir Zapolskiy , Paul Cercueil , Thierry Reding , Broadcom internal kernel review list , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Andrew Jeffery , Jiri Slaby , Masami Hiramatsu Errors-To: linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linux-aspeed" Since we have now a common helper to read port properties use it instead of sparse home grown solution. Signed-off-by: Andy Shevchenko --- drivers/tty/serial/8250/8250_bcm7271.c | 53 +++++++++----------------- 1 file changed, 18 insertions(+), 35 deletions(-) diff --git a/drivers/tty/serial/8250/8250_bcm7271.c b/drivers/tty/serial/8250/8250_bcm7271.c index 1532fa2e8ec4..5a25e78857f7 100644 --- a/drivers/tty/serial/8250/8250_bcm7271.c +++ b/drivers/tty/serial/8250/8250_bcm7271.c @@ -942,10 +942,8 @@ static int brcmuart_probe(struct platform_device *pdev) struct brcmuart_priv *priv; struct clk *baud_mux_clk; struct uart_8250_port up; - int irq; void __iomem *membase = NULL; resource_size_t mapbase = 0; - u32 clk_rate = 0; int ret; int x; int dma_irq; @@ -953,9 +951,6 @@ static int brcmuart_probe(struct platform_device *pdev) "uart", "dma_rx", "dma_tx", "dma_intr2", "dma_arb" }; - irq = platform_get_irq(pdev, 0); - if (irq < 0) - return irq; priv = devm_kzalloc(dev, sizeof(struct brcmuart_priv), GFP_KERNEL); if (!priv) @@ -1011,7 +1006,23 @@ static int brcmuart_probe(struct platform_device *pdev) } } - of_property_read_u32(np, "clock-frequency", &clk_rate); + dev_dbg(dev, "DMA is %senabled\n", priv->dma_enabled ? "" : "not "); + + memset(&up, 0, sizeof(up)); + up.port.type = PORT_BCM7271; + up.port.dev = dev; + up.port.mapbase = mapbase; + up.port.membase = membase; + up.port.handle_irq = brcmuart_handle_irq; + up.port.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT | UPF_FIXED_TYPE; + up.port.private_data = priv; + + ret = uart_read_port_properties(&up.port, true); + if (ret) + goto release_dma; + + up.port.regshift = 2; + up.port.iotype = device_is_big_endian(dev) ? UPIO_MEM32BE : UPIO_MEM32; /* See if a Baud clock has been specified */ baud_mux_clk = devm_clk_get_optional_enabled(dev, "sw_baud"); @@ -1023,39 +1034,11 @@ static int brcmuart_probe(struct platform_device *pdev) priv->baud_mux_clk = baud_mux_clk; init_real_clk_rates(dev, priv); - clk_rate = priv->default_mux_rate; + up.port.uartclk = priv->default_mux_rate; } else { dev_dbg(dev, "BAUD MUX clock not specified\n"); } - if (clk_rate == 0) { - ret = dev_err_probe(dev, -EINVAL, "clock-frequency or clk not defined\n"); - goto release_dma; - } - - dev_dbg(dev, "DMA is %senabled\n", priv->dma_enabled ? "" : "not "); - - memset(&up, 0, sizeof(up)); - up.port.type = PORT_BCM7271; - up.port.uartclk = clk_rate; - up.port.dev = dev; - up.port.mapbase = mapbase; - up.port.membase = membase; - up.port.irq = irq; - up.port.handle_irq = brcmuart_handle_irq; - up.port.regshift = 2; - up.port.iotype = of_device_is_big_endian(np) ? - UPIO_MEM32BE : UPIO_MEM32; - up.port.flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF - | UPF_FIXED_PORT | UPF_FIXED_TYPE; - up.port.dev = dev; - up.port.private_data = priv; - - /* Check for a fixed line number */ - ret = of_alias_get_id(np, "serial"); - if (ret >= 0) - up.port.line = ret; - /* setup HR timer */ hrtimer_init(&priv->hrt, CLOCK_MONOTONIC, HRTIMER_MODE_ABS); priv->hrt.function = brcmuart_hrtimer_func;