| Message ID | 20230809134413.3614535-1-dylan_hung@aspeedtech.com |
|---|---|
| State | Accepted, archived |
| Headers | show |
| Series | [v2] ARM: dts: pinctrl-aspeed-g6: Add I3C1 and I3C2 control pins | expand |
On Wed, 9 Aug 2023 at 13:44, Dylan Hung <dylan_hung@aspeedtech.com> wrote: > > Add pinctrl support for the I3C1 and I3C2 pins. > > Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com> > Reviewed-by: Jeremy Kerr <jk@codeconstruct.com.au> > --- > changes in v2: > There are no code or message changes in v2. This commit is being made as > a standalone patch separate from the original patch series, as the other > patches from the original series are no longer necessary. Thanks, I've applied this. > > arch/arm/boot/dts/aspeed/aspeed-g6-pinctrl.dtsi | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6-pinctrl.dtsi b/arch/arm/boot/dts/aspeed/aspeed-g6-pinctrl.dtsi > index 7cd4f075e325..289668f051eb 100644 > --- a/arch/arm/boot/dts/aspeed/aspeed-g6-pinctrl.dtsi > +++ b/arch/arm/boot/dts/aspeed/aspeed-g6-pinctrl.dtsi > @@ -297,6 +297,16 @@ pinctrl_i2c9_default: i2c9_default { > groups = "I2C9"; > }; > > + pinctrl_i3c1_default: i3c1_default { > + function = "I3C1"; > + groups = "I3C1"; > + }; > + > + pinctrl_i3c2_default: i3c2_default { > + function = "I3C2"; > + groups = "I3C2"; > + }; > + > pinctrl_i3c3_default: i3c3_default { > function = "I3C3"; > groups = "I3C3"; > -- > 2.25.1 >
diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6-pinctrl.dtsi b/arch/arm/boot/dts/aspeed/aspeed-g6-pinctrl.dtsi index 7cd4f075e325..289668f051eb 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-g6-pinctrl.dtsi +++ b/arch/arm/boot/dts/aspeed/aspeed-g6-pinctrl.dtsi @@ -297,6 +297,16 @@ pinctrl_i2c9_default: i2c9_default { groups = "I2C9"; }; + pinctrl_i3c1_default: i3c1_default { + function = "I3C1"; + groups = "I3C1"; + }; + + pinctrl_i3c2_default: i3c2_default { + function = "I3C2"; + groups = "I3C2"; + }; + pinctrl_i3c3_default: i3c3_default { function = "I3C3"; groups = "I3C3";