From patchwork Wed Dec 20 03:23:10 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 851196 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3z1g9S5Yxsz9sCZ for ; Wed, 20 Dec 2017 14:24:12 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="ZEpp+kwv"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3z1g9S4912zF07b for ; Wed, 20 Dec 2017 14:24:12 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="ZEpp+kwv"; dkim-atps=neutral X-Original-To: linux-aspeed@lists.ozlabs.org Delivered-To: linux-aspeed@lists.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:400e:c01::242; helo=mail-pl0-x242.google.com; envelope-from=joel.stan@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="ZEpp+kwv"; dkim-atps=neutral Received: from mail-pl0-x242.google.com (mail-pl0-x242.google.com [IPv6:2607:f8b0:400e:c01::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3z1g9P20P5zF07S for ; Wed, 20 Dec 2017 14:24:09 +1100 (AEDT) Received: by mail-pl0-x242.google.com with SMTP id i6so8251701plt.13 for ; Tue, 19 Dec 2017 19:24:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=PNasiNy6rFMiHmPQt47xEjbUmasBpA9TaOZ4PUtiLuQ=; b=ZEpp+kwv1W42/yuNEDJgCmxioWGBhH1QvcsZ6hn0I0srr5VXMXZgld36Ar6dlW8Xgz 28D+JaxSCgoNY6lZ46beNhWpLI+lc0/CM93YYBt1ZDK5ZRnQo78po9zamXLcLvH4YWbY +EKaFx9othbV9aA4N5DeqVIlLkt2o6UvwaDTR/3Qd1RA1w3H3giDYmj/FCThXeXMtXvn xfiyOhUL5xhvLhUX7stG2fJXDxnjG6HxewGIRykr5R8tti8HoPZv1tvFhQ1MTchLca9Y g7GykqWhh1ATEvq/phVmoI9m/o0YCkcScNFhaFisAjdqwZVMJjVeP0Eo7g9kNsTKVUbx 5VRA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=PNasiNy6rFMiHmPQt47xEjbUmasBpA9TaOZ4PUtiLuQ=; b=l5EKFjzmNpjqiyw+pdddK30Ew5uc49RXeBBcu1h6qtEOhn5UxoGf75VWroQ03DNYwP yt5FmYPDxiwHedpZ5x6h0k7yqqvBhoKx/Xt6+Hwi7gM7oPNIQiAk6k+3L9MTA46ss+a2 uVXL9Q1k3+LLmIkxwlzqe68hveiJIOXADrYJfdnfxH3YFGHkInFe3pd7chBH49ysTKSi Vi41NhymlweO1cgdbYg6Yef/weDf+CNscr1p1OdsfpMvfmGuseaI1IhBRK6PO6GU+d9T SUkXZez5Po9Nrl2tCZ9Ha5UsgRTbPMkkZWYjETyrBofSAY2KF87LhdvQvDtdMZ0Pl3fV EfmQ== X-Gm-Message-State: AKGB3mJ0k3ZwXMdU2nX9/Uua2XrUQsm0VA5O59A5MGJC3n17LQ4HU4Mg ivEGJUVxV596klLsf7sRLCM= X-Google-Smtp-Source: ACJfBovzjz27zTgSaTrB6KxDXtjx1i5gitYZD1jagjl6NeuLbrA+VGIdqgi+X3pvw28AJTsYPuOesQ== X-Received: by 10.84.129.193 with SMTP id b59mr5381286plb.361.1513740247105; Tue, 19 Dec 2017 19:24:07 -0800 (PST) Received: from aurora.jms.id.au ([45.124.203.15]) by smtp.gmail.com with ESMTPSA id t75sm3872443pgc.12.2017.12.19.19.23.59 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 19 Dec 2017 19:24:05 -0800 (PST) Received: by aurora.jms.id.au (sSMTP sendmail emulation); Wed, 20 Dec 2017 13:53:55 +1030 From: Joel Stanley To: Rob Herring , Mark Rutland , Arnd Bergmann , Andrew Jeffery , Patrick Venture , Xo Wang , Lei YU Subject: [PATCH v3 02/20] dt-bindings: gpio: Add ASPEED constants Date: Wed, 20 Dec 2017 13:53:10 +1030 Message-Id: <20171220032328.30584-3-joel@jms.id.au> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20171220032328.30584-1-joel@jms.id.au> References: <20171220032328.30584-1-joel@jms.id.au> X-BeenThere: linux-aspeed@lists.ozlabs.org X-Mailman-Version: 2.1.24 Precedence: list List-Id: Linux ASPEED SoC development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-aspeed@lists.ozlabs.org, Benjamin Herrenschmidt , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Jeremy Kerr Errors-To: linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linux-aspeed" These are used to by the device tree to map pin numbers to constants required by the GPIO bindings. Signed-off-by: Joel Stanley Reviewed-by: Rob Herring --- v3: - Remove dtsi includes from this patch, they will come later --- include/dt-bindings/gpio/aspeed-gpio.h | 49 ++++++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) create mode 100644 include/dt-bindings/gpio/aspeed-gpio.h diff --git a/include/dt-bindings/gpio/aspeed-gpio.h b/include/dt-bindings/gpio/aspeed-gpio.h new file mode 100644 index 000000000000..56fc4889b2c4 --- /dev/null +++ b/include/dt-bindings/gpio/aspeed-gpio.h @@ -0,0 +1,49 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * This header provides constants for binding aspeed,*-gpio. + * + * The first cell in Aspeed's GPIO specifier is the GPIO ID. The macros below + * provide names for this. + * + * The second cell contains standard flag values specified in gpio.h. + */ + +#ifndef _DT_BINDINGS_GPIO_ASPEED_GPIO_H +#define _DT_BINDINGS_GPIO_ASPEED_GPIO_H + +#include + +#define ASPEED_GPIO_PORT_A 0 +#define ASPEED_GPIO_PORT_B 1 +#define ASPEED_GPIO_PORT_C 2 +#define ASPEED_GPIO_PORT_D 3 +#define ASPEED_GPIO_PORT_E 4 +#define ASPEED_GPIO_PORT_F 5 +#define ASPEED_GPIO_PORT_G 6 +#define ASPEED_GPIO_PORT_H 7 +#define ASPEED_GPIO_PORT_I 8 +#define ASPEED_GPIO_PORT_J 9 +#define ASPEED_GPIO_PORT_K 10 +#define ASPEED_GPIO_PORT_L 11 +#define ASPEED_GPIO_PORT_M 12 +#define ASPEED_GPIO_PORT_N 13 +#define ASPEED_GPIO_PORT_O 14 +#define ASPEED_GPIO_PORT_P 15 +#define ASPEED_GPIO_PORT_Q 16 +#define ASPEED_GPIO_PORT_R 17 +#define ASPEED_GPIO_PORT_S 18 +#define ASPEED_GPIO_PORT_T 19 +#define ASPEED_GPIO_PORT_U 20 +#define ASPEED_GPIO_PORT_V 21 +#define ASPEED_GPIO_PORT_W 22 +#define ASPEED_GPIO_PORT_X 23 +#define ASPEED_GPIO_PORT_Y 24 +#define ASPEED_GPIO_PORT_Z 25 +#define ASPEED_GPIO_PORT_AA 26 +#define ASPEED_GPIO_PORT_AB 27 +#define ASPEED_GPIO_PORT_AC 28 + +#define ASPEED_GPIO(port, offset) \ + ((ASPEED_GPIO_PORT_##port * 8) + offset) + +#endif