From patchwork Wed Oct 4 06:49:17 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 821178 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3y6RPd5MXkz9t2Z for ; Wed, 4 Oct 2017 17:51:01 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Ube2t96c"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3y6RPd42byzDqln for ; Wed, 4 Oct 2017 17:51:01 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Ube2t96c"; dkim-atps=neutral X-Original-To: linux-aspeed@lists.ozlabs.org Delivered-To: linux-aspeed@lists.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:400e:c00::244; helo=mail-pf0-x244.google.com; envelope-from=joel.stan@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Ube2t96c"; dkim-atps=neutral Received: from mail-pf0-x244.google.com (mail-pf0-x244.google.com [IPv6:2607:f8b0:400e:c00::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3y6RPZ5SDhzDqln for ; Wed, 4 Oct 2017 17:50:58 +1100 (AEDT) Received: by mail-pf0-x244.google.com with SMTP id f84so11540994pfj.3 for ; Tue, 03 Oct 2017 23:50:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=69K2Z/GAxCg6LxZ3T2lJjaJU4UQ0yrniyWN9XbUUz2Y=; b=Ube2t96cpPjp9ougyOoPD3U0fJoIvQ/a5lW+kRXElMqTkmi8XVlaaRftNpQ1f/suDU n71Wmoj1FucW86ZjOT9YOTDAMoeCQgRn3wn0TRkGWqioB6iqk4tzB7tNRZGSyyV/8A7c iyNvmsOeWbitXgQ6pjp6M8rQ3LFDN8GGoeKa9AcmtGSFqZjuchkJJntoXpMa5vbBKZpr YqtJRgUjJTddxU7js0sWfeS3qsElnzz6Ve2aTnVVv3mwE1pOeqxBEb1hTe2NnXjuYTL+ Se/tQlFPmM8SgrjWRhiZDulp5qrM5KH6J0vB4+QXt5KXn+8DMlWpD3//liw461l3J4N9 49rA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=69K2Z/GAxCg6LxZ3T2lJjaJU4UQ0yrniyWN9XbUUz2Y=; b=VASRcPaQZ0Yh19Rp5suXqD4YdjgLtzHeEddmwF+WALsh4+wulwLDM8N61AnxiRouEe e1anHty42qQrWIDkHiZQX4EkAhiyisyodM+QfOz0IIrYQSGw8SjLPS1M4P/YrtfFVCU/ nCgJ6l+5TR7FgyPXqeCkNUrjuLVOKsS+4GSyK3NyVTFlQLpF/DjmUZ9IYC7FZd9MYSld H+HRCcWwZx+8wKaSfCTe5zlh9Slxh3aKBpfWyPhj/ZesZbj4li3icxxXqn5wzobSoeVE TVsAQLKuS3dAxPkiYsGLqu9Pg4ApYl3jc9LXI98scEQmJTV6YK3aUAvd9lyWpWSUNWS6 zymA== X-Gm-Message-State: AMCzsaWkGCiDWq6y+GOOerTL2iqOzzcA2aTUYYEOGUn+B8mgGdpqXN7U lVgLEGzFXeeyeUjGD/oJqIo= X-Google-Smtp-Source: AOwi7QBIdnid97QDOWGCuJOEWcJVK4zh+X148yVStjNv8ONm+LM0LBcUuCcpkyEiADa3UyhhRMS70g== X-Received: by 10.99.160.86 with SMTP id u22mr9972216pgn.283.1507099856661; Tue, 03 Oct 2017 23:50:56 -0700 (PDT) Received: from aurora.jms.id.au ([203.0.153.9]) by smtp.gmail.com with ESMTPSA id h10sm26304759pgn.73.2017.10.03.23.50.50 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 03 Oct 2017 23:50:55 -0700 (PDT) Received: by aurora.jms.id.au (sSMTP sendmail emulation); Wed, 04 Oct 2017 17:20:47 +1030 From: Joel Stanley To: Joel Stanley , Rob Herring , Mark Rutland Subject: [PATCH v2 9/9] ARM: dts: aspeed: Clean up UART nodes Date: Wed, 4 Oct 2017 17:19:17 +1030 Message-Id: <20171004064917.2498-10-joel@jms.id.au> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20171004064917.2498-1-joel@jms.id.au> References: <20171004064917.2498-1-joel@jms.id.au> X-BeenThere: linux-aspeed@lists.ozlabs.org X-Mailman-Version: 2.1.24 Precedence: list List-Id: Linux ASPEED SoC development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-aspeed@lists.ozlabs.org, Brendan Higgins , Russell King , linux-kernel@vger.kernel.org, Rick Altherr , linux-arm-kernel@lists.infradead.org Errors-To: linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linux-aspeed" - Shorten size of reg property so it covers only the implemented registers - Add VUART compatible, and change node name to serial@ - Remove outdated current-speed property. Different bootloaders use different speeds, so this is no longer helpful Signed-off-by: Joel Stanley Reviewed-by: Andrew Jeffery --- v2: - move node reordering to seperate patch - fix vuart node name - actually remove current-speed from g4 --- arch/arm/boot/dts/aspeed-g4.dtsi | 18 +++++++++--------- arch/arm/boot/dts/aspeed-g5.dtsi | 18 +++++++++--------- 2 files changed, 18 insertions(+), 18 deletions(-) diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index 4125e07f22f9..e455bd236798 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -27,6 +27,7 @@ serial2 = &uart3; serial3 = &uart4; serial4 = &uart5; + serial5 = &vuart; }; cpus { @@ -185,7 +186,7 @@ uart1: serial@1e783000 { compatible = "ns16550a"; - reg = <0x1e783000 0x1000>; + reg = <0x1e783000 0x20>; reg-shift = <2>; interrupts = <9>; clocks = <&clk_uart>; @@ -195,11 +196,10 @@ uart5: serial@1e784000 { compatible = "ns16550a"; - reg = <0x1e784000 0x1000>; + reg = <0x1e784000 0x20>; reg-shift = <2>; interrupts = <10>; clocks = <&clk_uart>; - current-speed = <38400>; no-loopback-test; status = "disabled"; }; @@ -218,9 +218,9 @@ status = "disabled"; }; - uart6: serial@1e787000 { - compatible = "ns16550a"; - reg = <0x1e787000 0x1000>; + vuart: serial@1e787000 { + compatible = "aspeed,ast2400-vuart"; + reg = <0x1e787000 0x40>; reg-shift = <2>; interrupts = <10>; clocks = <&clk_uart>; @@ -230,7 +230,7 @@ uart2: serial@1e78d000 { compatible = "ns16550a"; - reg = <0x1e78d000 0x1000>; + reg = <0x1e78d000 0x20>; reg-shift = <2>; interrupts = <32>; clocks = <&clk_uart>; @@ -240,7 +240,7 @@ uart3: serial@1e78e000 { compatible = "ns16550a"; - reg = <0x1e78e000 0x1000>; + reg = <0x1e78e000 0x20>; reg-shift = <2>; interrupts = <33>; clocks = <&clk_uart>; @@ -250,7 +250,7 @@ uart4: serial@1e78f000 { compatible = "ns16550a"; - reg = <0x1e78f000 0x1000>; + reg = <0x1e78f000 0x20>; reg-shift = <2>; interrupts = <34>; clocks = <&clk_uart>; diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index 61cc2d25143a..cef51dcc1002 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -27,6 +27,7 @@ serial2 = &uart3; serial3 = &uart4; serial4 = &uart5; + serial5 = &vuart; }; cpus { @@ -229,7 +230,7 @@ uart1: serial@1e783000 { compatible = "ns16550a"; - reg = <0x1e783000 0x1000>; + reg = <0x1e783000 0x20>; reg-shift = <2>; interrupts = <9>; clocks = <&clk_uart>; @@ -239,11 +240,10 @@ uart5: serial@1e784000 { compatible = "ns16550a"; - reg = <0x1e784000 0x1000>; + reg = <0x1e784000 0x20>; reg-shift = <2>; interrupts = <10>; clocks = <&clk_uart>; - current-speed = <38400>; no-loopback-test; status = "disabled"; }; @@ -297,9 +297,9 @@ }; }; - uart6: serial@1e787000 { - compatible = "ns16550a"; - reg = <0x1e787000 0x1000>; + vuart: vuart@1e787000 { + compatible = "aspeed,ast2500-vuart"; + reg = <0x1e787000 0x40>; reg-shift = <2>; interrupts = <10>; clocks = <&clk_uart>; @@ -309,7 +309,7 @@ uart2: serial@1e78d000 { compatible = "ns16550a"; - reg = <0x1e78d000 0x1000>; + reg = <0x1e78d000 0x20>; reg-shift = <2>; interrupts = <32>; clocks = <&clk_uart>; @@ -319,7 +319,7 @@ uart3: serial@1e78e000 { compatible = "ns16550a"; - reg = <0x1e78e000 0x1000>; + reg = <0x1e78e000 0x20>; reg-shift = <2>; interrupts = <33>; clocks = <&clk_uart>; @@ -329,7 +329,7 @@ uart4: serial@1e78f000 { compatible = "ns16550a"; - reg = <0x1e78f000 0x1000>; + reg = <0x1e78f000 0x20>; reg-shift = <2>; interrupts = <34>; clocks = <&clk_uart>;