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Fri, 10 Jul 2020 23:38:14 +0000 (UTC) X-SNPS-Relay: synopsys.com From: Vineet Gupta To: libc-alpha@sourceware.org Subject: [COMMITTED 04/13] ARC: Atomics and Locking primitives Date: Fri, 10 Jul 2020 16:38:01 -0700 Message-Id: <20200710233810.18720-4-vgupta@synopsys.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200710233810.18720-1-vgupta@synopsys.com> References: <20200710233810.18720-1-vgupta@synopsys.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200710_193816_556633_B00569A0 X-CRM114-Status: GOOD ( 13.16 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 RCVD_IN_MSPIKE_H4 RBL: Very Good reputation (+4) [149.117.87.133 listed in wl.mailspike.net] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.0 RCVD_IN_MSPIKE_WL Mailspike good senders X-BeenThere: linux-snps-arc@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on Synopsys ARC Processors List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vineet Gupta , linux-snps-arc@lists.infradead.org, Adhemerval Zanella Sender: "linux-snps-arc" Errors-To: linux-snps-arc-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org Reviewed-by: Adhemerval Zanella --- sysdeps/arc/atomic-machine.h | 69 ++++++++++++++++++++++++++++++++++++ 1 file changed, 69 insertions(+) create mode 100644 sysdeps/arc/atomic-machine.h diff --git a/sysdeps/arc/atomic-machine.h b/sysdeps/arc/atomic-machine.h new file mode 100644 index 000000000000..1c8638bb44ef --- /dev/null +++ b/sysdeps/arc/atomic-machine.h @@ -0,0 +1,69 @@ +/* Low-level functions for atomic operations. ARC version. + Copyright (C) 2020 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library. If not, see + . */ + +#ifndef _ARC_BITS_ATOMIC_H +#define _ARC_BITS_ATOMIC_H 1 + +#include + +typedef int32_t atomic32_t; +typedef uint32_t uatomic32_t; +typedef int_fast32_t atomic_fast32_t; +typedef uint_fast32_t uatomic_fast32_t; + +typedef intptr_t atomicptr_t; +typedef uintptr_t uatomicptr_t; +typedef intmax_t atomic_max_t; +typedef uintmax_t uatomic_max_t; + +#define __HAVE_64B_ATOMICS 0 +#define USE_ATOMIC_COMPILER_BUILTINS 1 + +/* ARC does have legacy atomic EX reg, [mem] instruction but the micro-arch + is not as optimal as LLOCK/SCOND specially for SMP. */ +#define ATOMIC_EXCHANGE_USES_CAS 1 + +#define __arch_compare_and_exchange_bool_8_acq(mem, newval, oldval) \ + (abort (), 0) +#define __arch_compare_and_exchange_bool_16_acq(mem, newval, oldval) \ + (abort (), 0) +#define __arch_compare_and_exchange_bool_64_acq(mem, newval, oldval) \ + (abort (), 0) + +#define __arch_compare_and_exchange_val_8_int(mem, newval, oldval, model) \ + (abort (), (__typeof (*mem)) 0) +#define __arch_compare_and_exchange_val_16_int(mem, newval, oldval, model) \ + (abort (), (__typeof (*mem)) 0) +#define __arch_compare_and_exchange_val_64_int(mem, newval, oldval, model) \ + (abort (), (__typeof (*mem)) 0) + +#define __arch_compare_and_exchange_val_32_int(mem, newval, oldval, model) \ + ({ \ + typeof (*mem) __oldval = (oldval); \ + __atomic_compare_exchange_n (mem, (void *) &__oldval, newval, 0, \ + model, __ATOMIC_RELAXED); \ + __oldval; \ + }) + +#define atomic_compare_and_exchange_val_acq(mem, new, old) \ + __atomic_val_bysize (__arch_compare_and_exchange_val, int, \ + mem, new, old, __ATOMIC_ACQUIRE) + +#define atomic_full_barrier() ({ asm volatile ("dmb 3":::"memory"); }) + +#endif /* _ARC_BITS_ATOMIC_H */