From patchwork Sun May 28 06:51:59 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Noam Camus X-Patchwork-Id: 767822 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3wb9Y829Vlz9ryr for ; Sun, 28 May 2017 16:52:43 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="WI2Bfo0p"; dkim-atps=neutral DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=nfJY5lhtphTfYXuCZgmsh1/fKhOn9zUUpSRi2b611Mg=; b=WI2Bfo0pOAcDnIS3G5iW9Hd0Il f9G/y8L7cXNLOVkkPvyH4u90woIIAX6ITcm9rvO/xXY2n1vTc08hJOATFcBUssyEa+JvumUxp+KjN pbr99Lx1tG2DBr7lkXTI15OeZESmeTdZFYWTOEGrD7eBcwGmid0C0eIA5EawGDoCEjG6OmiqCEUDT pBi45sVfaTlNrJADIHHoqQccXUbTliQ7sj1L5Ig7pKE2TfylQTRvkwbDyM9EwtRjDbcToSZxz/jzm SuSVLmPst+K4XS8i4mTYiod5qI53VeecdCw5g8hi34x4fDObxNQcpJi364+Gqm3lIAaLVzHLjWCQy eTkL0Z7g==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dEs49-0005id-Qv; Sun, 28 May 2017 06:52:41 +0000 Received: from mail-il-dmz.mellanox.com ([193.47.165.129] helo=mellanox.co.il) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dEs45-0005d6-8X for linux-snps-arc@lists.infradead.org; Sun, 28 May 2017 06:52:39 +0000 Received: from Internal Mail-Server by MTLPINE1 (envelope-from noamca@mellanox.com) with ESMTPS (AES256-SHA encrypted); 28 May 2017 09:52:10 +0300 Received: from nps20.mtl.labs.mlnx. (l-nps20.mtl.labs.mlnx [10.7.191.20]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id v4S6qAdh014805; Sun, 28 May 2017 09:52:10 +0300 From: Noam Camus To: linux-snps-arc@lists.infradead.org Subject: [PATCH v2 02/11] ARC: send ipi to all cpus sharing task mm in case of page fault Date: Sun, 28 May 2017 09:51:59 +0300 Message-Id: <1495954328-28736-3-git-send-email-noamca@mellanox.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1495954328-28736-1-git-send-email-noamca@mellanox.com> References: <1495954328-28736-1-git-send-email-noamca@mellanox.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170527_235237_740802_3F612648 X-CRM114-Status: UNSURE ( 8.84 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.4.1 on bombadil.infradead.org summary: Content analysis details: (-1.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record -0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.0 UNPARSEABLE_RELAY Informational: message has unparseable relay lines X-BeenThere: linux-snps-arc@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Linux on Synopsys ARC Processors List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Noam Camus , linux-kernel@vger.kernel.org MIME-Version: 1.0 Sender: "linux-snps-arc" Errors-To: linux-snps-arc-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org From: Noam Camus This patch is derived due to performance issue. The use case is a page fault that resides on more than the local cpu. Trying to broadcast all CPUs results on performance degradation. So we try to avoid this by sending only to the relevant CPUs. Signed-off-by: Noam Camus Reviewed-by: Alexey Brodkin --- arch/arc/include/asm/cacheflush.h | 3 ++- arch/arc/mm/cache.c | 12 ++++++++++-- arch/arc/mm/tlb.c | 2 +- 3 files changed, 13 insertions(+), 4 deletions(-) diff --git a/arch/arc/include/asm/cacheflush.h b/arch/arc/include/asm/cacheflush.h index fc662f4..716dba1 100644 --- a/arch/arc/include/asm/cacheflush.h +++ b/arch/arc/include/asm/cacheflush.h @@ -33,7 +33,8 @@ void flush_icache_range(unsigned long kstart, unsigned long kend); void __sync_icache_dcache(phys_addr_t paddr, unsigned long vaddr, int len); -void __inv_icache_page(phys_addr_t paddr, unsigned long vaddr); +void __inv_icache_page(struct vm_area_struct *vma, + phys_addr_t paddr, unsigned long vaddr); void __flush_dcache_page(phys_addr_t paddr, unsigned long vaddr); #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1 diff --git a/arch/arc/mm/cache.c b/arch/arc/mm/cache.c index 7d3e79b..e1ea57f 100644 --- a/arch/arc/mm/cache.c +++ b/arch/arc/mm/cache.c @@ -934,9 +934,17 @@ void __sync_icache_dcache(phys_addr_t paddr, unsigned long vaddr, int len) } /* wrapper to compile time eliminate alignment checks in flush loop */ -void __inv_icache_page(phys_addr_t paddr, unsigned long vaddr) +void __inv_icache_page(struct vm_area_struct *vma, + phys_addr_t paddr, unsigned long vaddr) { - __ic_line_inv_vaddr(paddr, vaddr, PAGE_SIZE); + struct ic_inv_args ic_inv = { + .paddr = paddr, + .vaddr = vaddr, + .sz = PAGE_SIZE + }; + + on_each_cpu_mask(mm_cpumask(vma->vm_mm), + __ic_line_inv_vaddr_helper, &ic_inv, 1); } /* diff --git a/arch/arc/mm/tlb.c b/arch/arc/mm/tlb.c index c5e70d8..a095608 100644 --- a/arch/arc/mm/tlb.c +++ b/arch/arc/mm/tlb.c @@ -626,7 +626,7 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long vaddr_unaligned, /* invalidate any existing icache lines (U-mapping) */ if (vma->vm_flags & VM_EXEC) - __inv_icache_page(paddr, vaddr); + __inv_icache_page(vma, paddr, vaddr); } } }